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參數(shù)資料
| 型號： | DS17485SN-5+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 31/31頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC 5V 4K NV RAM 24-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 31 |
| 類型： | 時鐘/日歷 |
| 特點： | 警報器，夏令時，閏年，NVSRAM，方波輸出 |
| 存儲容量： | 4KB |
| 時間格式： | HH:MM:SS（12/24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | 并聯(lián) |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 電壓 - 電源，電池： | 2.5 V ~ 3.7 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SOIC W |
| 包裝： | 管件 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁當(dāng)前第31頁
DS17285/DS17287/DS17485/DS17487/DS17885/DS17887
Real-Time Clocks
_____________________________________________________________________
9
Pin Description (continued)
PIN
24
28
NAME
FUNCTION
21
3
RCLR
Active-Low RAM Clear Input. This pin is used to clear (set to logic 1) all the 114 bytes of
general-purpose RAM but does not affect the RAM associated with the real time clock or
extended RAM.
RCLR may be invoked while the part is powered from any supply. The
RCLR function is designed to be used via a human interface (shorting to ground manually
or by a switch) and not to be driven with external buffers. This pin is internally pulled up. Do
not use an external pullup resistor on this pin.
22
4
VBAUX
Auxiliary Battery Input. Required for kickstart and wake-up functions. This input also
supports clock/calendar and user RAM if VBAT is at lower voltage or is not used. A standard
+3V lithium cell or other energy source can be used. Diodes placed in series between
VBAUX and the battery may prevent proper operation. UL recognized to ensure against
reverse charging current when used with a lithium battery (www.maxim-ic.com/qa/info/ul/).
For 3V VCC operation, VBAUX must be held between +2.5V and +3.7V. For 5V VCC operation,
VBAUX must be held between +2.5V and +5.2V. If VBAUX is not used it should be grounded
and the auxiliary-battery-enable bit bank 1, register 4BH, should = 0.
23
5
SQW
Square-Wave Output. When VCC rises above VPF, bits DV1 and E32k are set to 1. This
condition enables a 32kHz square-wave output. A square wave is output if either SQWE = 1
or E32k = 1. If E32k = 1, then 32kHz is output regardless of the other control bits. If E32k =
0, then the output frequency is dependent on the control bits in Register A. The SQW pin
can output a signal from one of 13 taps provided by the 15 internal divider stages of the
RTC. The frequency of the SQW pin can be changed by programming Register A, as shown
in Table 3. The SQW signal can be turned on and off using the SQWE bit in Register B or the
E32k bit in extended register 4Bh. A 32kHz square wave is also available when VCC is less
than VPF if E32k = 1, ABE = 1, and voltage is applied to the VBAUX pin. When disabled,
SQW is high impedance when VCC is below VPF.
24
6, 7
VCC
DC Power Pin for Primary Power Supply. When VCC is applied within normal limits, the
device is fully accessible and data can be written and read. When VCC is below VPF reads
and writes are inhibited.
2, 3, 16,
20
(DS17x87
only)
11, 18
N.C.
No Connection
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