參數(shù)資料
型號: MCP4131T-103E/SN
廠商: Microchip Technology
文件頁數(shù): 1/59頁
文件大?。?/td> 0K
描述: IC POT DGTL SNGL 10K SPI 8SOIC
標(biāo)準(zhǔn)包裝: 3,300
接片: 129
電阻(歐姆): 10k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 150 ppm/°C
存儲器類型: 易失
接口: 3 線 SPI(芯片選擇)
電源電壓: 1.8 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOICN
包裝: 帶卷 (TR)
2008 Microchip Technology Inc.
DS22060B-page 1
MCP413X/415X/423X/425X
Features
Single or Dual Resistor Network options
Potentiometer or Rheostat configuration options
Resistor Network Resolution
- 7-bit: 128 Resistors (129 Steps)
- 8-bit: 256 Resistors (257 Steps)
RAB Resistances options of:
-5 k
-10 k
-50 k
- 100 k
Zero Scale to Full-Scale Wiper operation
Low Wiper Resistance: 75 (typical)
Low Tempco:
- Absolute (Rheostat): 50 ppm typical
(0°C to 70°C)
- Ratiometric (Potentiometer): 15 ppm typical
SPI Serial Interface (10 MHz, modes 0,0 & 1,1)
- High-Speed Read/Writes to wiper registers
- SDI/SDO multiplexing (MCP41X1 only)
Resistor Network Terminal Disconnect Feature
via:
- Shutdown pin (SHDN)
- Terminal Control (TCON) Register
Brown-out reset protection (1.5V typical)
Serial Interface Inactive current (2.5 uA typical)
High-Voltage Tolerant Digital Inputs: Up to 12.5V
Supports Split Rail Applications
Internal weak pull-up on all digital inputs
Wide Operating Voltage:
- 2.7V to 5.5V - Device Characteristics
Specified
- 1.8V to 5.5V - Device Operation
Wide Bandwidth (-3 dB) Operation:
- 2 MHz (typical) for 5.0 k device
Extended temperature range (-40°C to +125°C)
Description
The MCP41XX and MCP42XX devices offer a wide
range of product offerings using an SPI interface. This
family of devices support 7-bit and 8-bit resistor
networks, and Potentiometer and Rheostat pinouts.
Package Types (top view)
1
2
3
4
5
6
7
8
P0W
P0B
P0A
VSS
VDD
MCP41X1
Single Potentiometer
PDIP, SOIC, MSOP
CS
SDI/SDO
SCK
1
2
3
4
5
6
7
8
P0B
SDO
P0W
VDD
MCP41X2
Single Rheostat
PDIP, SOIC, MSOP
1
2
3
4
11
12
13
14
SHDN
SDO
WP
VDD
MCP42X1 Dual Potentiometers
PDIP, SOIC, TSSOP
5
6
7
8
9
10
P0W
P0B
P0A
P1A
P1W
P1B
VSS
CS
SDI
SCK
VSS
CS
SDI
SCK
4x4 QFN*
1
2
3
4
7
8
9
10
SDO
VDD
MCP42X2 Dual Rheostat
MSOP, DFN
5
6
P0B
P0W
P1W
P1B
VSS
CS
SDI
SCK
3x3 DFN*
SDI/SDO
SCK
VSS
P0B
P0W
1
2
3
4
8
7
6
5 P0A
CS
EP
9
3x3 DFN*
SDI
SCK
VSS
SDO
P0B
1
2
3
4
8
7
6
5 P0W
VDD
CS
EP
9
VDD
3x3 DFN*
SDI
SCK
VSS
SDO
P0B
1
2
3
4
10
9
8
7 P0W
CS
EP
11
VDD
5
6
P1B
P1W
* Includes Exposed Thermal Pad (EP); see Table 3-1.
2
VSS
SCK
WP
NC
P1
B
P0B
P1W
P1
A
P0
A
P0W
CS
V
DD
SDO
SHDN
SDI
EP
16
1
15 14 13
3
4
12
11
10
9
56
7
8
17
7/8-Bit Single/Dual SPI Digital POT with Volatile Memory
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