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參數(shù)資料
| 型號： | AD826ARZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 2/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP VF 50MHZ DUAL LP 8SOIC |
| 標準包裝： | 1,000 |
| 放大器類型： | 電壓反饋 |
| 電路數(shù)： | 2 |
| 轉(zhuǎn)換速率： | 350 V/µs |
| 增益帶寬積： | 50MHz |
| -3db帶寬： | 50MHz |
| 電流 - 輸入偏壓： | 3.3µA |
| 電壓 - 輸入偏移： | 500µV |
| 電流 - 電源： | 6.6mA |
| 電流 - 輸出 / 通道： | 50mA |
| 電壓 - 電源，單路/雙路(±)： | 5 V ~ 36 V，±2.5 V ~ 18 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
AD826
-10-
Rev. C
THEORY OF OPERATION
The AD826 is a low cost, wide band, high performance dual
operational amplifier which can drive heavy capacitive and
resistive loads. It also achieves a constant slew rate, bandwidth
and settling time over its entire specified temperature range.
The AD826 (Figure 35) consists of a degenerated NPN
differential pair driving matched PNPs in a folded-cascode gain
stage. The output buffer stage employs emitter followers in a
class AB amplifier which delivers the necessary current to the
load while maintaining low levels of distortion.
OUTPUT
CF
NULL1
NULL8
–VS
–IN
+IN
+VS
Figure 35. Simplified Schematic
The capacitor, CF, in the output stage mitigates the effect of
capacitive loads. With low capacitive loads, the gain from the
compensation node to the output is very close to unity. In this
case, CF is bootstrapped and does not contribute to the overall
compensation capacitance of the device. As the capacitive load
is increased, a pole is formed with the output impedance of the
output stage. This reduces the gain, and therefore, CF is
incompletely bootstrapped. Effectively, some fraction of CF
contributes to the overall compensation capacitance, reducing
the unity gain bandwidth. As the load capacitance is further
increased, the bandwidth continues to fall, maintaining the
stability of the amplifier.
INPUT CONSIDERATIONS
An input protection resistor (RIN in Figure 25) is required in
circuits where the input to the AD826 will be subjected to
transient or continuous overload voltages exceeding the ±6 V
maximum differential limit. This resistor provides protection
for the input transistors by limiting their maximum base current.
For high performance circuits, it is recommended that a
“balancing” resistor be used to reduce the offset errors caused
by bias current flowing through the input and feedback resistors.
The balancing resistor equals the parallel combination of RIN
and RF and thus provides a matched impedance at each input
terminal. The offset voltage error will then be reduced by more
than an order of magnitude.
APPLYING THE AD826
The AD826 is a breakthrough dual amp that delivers precision
and speed at low cost with low power consumption. The AD826
offers excellent static and dynamic matching characteristics,
combined with the ability to drive heavy resistive and capacitive
loads. As with all high frequency circuits, care should be taken
to maintain overall device performance as well as their matching.
The following items are presented as general design considerations.
Circuit Board Layout
Input and output runs should be laid out so as to physically
isolate them from remaining runs. In addition, the feedback
resistor of each amplifier should be placed away from the
feedback resistor of the other amplifier, since this greatly
reduces inter-amp coupling.
Choosing Feedback and Gain Resistors
In order to prevent the stray capacitance present at each
amplifier’s summing junction from limiting its performance,
the feedback resistors should be ≤1 kΩ. Since the summing
junction capacitance may cause peaking, a small capacitor
(1 pF–5pF) maybe paralleled with RF to neutralize this effect.
Finally, sockets should be avoided, because of their tendency to
increase interlead capacitance.
Power Supply Considerations
To ensure the proper operation of the AD826, connect the
positive supply before the negative supply. Also, proper power
supply decoupling is critical to preserve the integrity of high
frequency signals. In carefully laid out designs, decoupling
capacitors should be placed in close proximity to the supply
pins, while their lead lengths should be kept to a minimum.
These measures greatly reduce undesired inductive effects on
the amplifier’s response.
Though two 0.1 μF capacitors will typically be effective in
decoupling the supplies, several capacitors of different values
can be paralleled to cover a wider frequency range.
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| AD8270ACPZ-R7 | 功能描述:IC AMP DIFF 20MHZ DUAL 16LFCSP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:50 系列:LinCMOS™ 放大器類型:通用 電路數(shù):4 輸出類型:- 轉(zhuǎn)換速率:0.05 V/µs 增益帶寬積:110kHz -3db帶寬:- 電流 - 輸入偏壓:0.7pA 電壓 - 輸入偏移:210µV 電流 - 電源:57µA 電流 - 輸出 / 通道:30mA 電壓 - 電源，單路/雙路(±):3 V ~ 16 V，±1.5 V ~ 8 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:14-SOIC 包裝:管件 產(chǎn)品目錄頁面:865 (CN2011-ZH PDF) 其它名稱:296-1834296-1834-5 |
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