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參數(shù)資料
| 型號： | AD827JNZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP GP 50MHZ DUAL LP 8DIP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 2 |
| 轉(zhuǎn)換速率： | 300 V/µs |
| 增益帶寬積： | 50MHz |
| 電流 - 輸入偏壓： | 3.3µA |
| 電壓 - 輸入偏移： | 500µV |
| 電流 - 電源： | 10.5mA |
| 電流 - 輸出 / 通道： | 32mA |
| 電壓 - 電源，單路/雙路(±)： | ±4.5 V ~ 18 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 766 (CN2011-ZH PDF) |
AD827
REV. C
–8–
multipliers connected in series. They could also be placed in
parallel with an increase in bandwidth and a reduction in gain.
The gain of the circuit is controlled by VX, which can range
from 0 to 3 V dc. Measurements show that this circuit easily
supplies 2 V p-p into a 100
load while operating from ±5 V
supplies. The overall bandwidth of the circuit is approximately
7 MHz with 0.5 dB of peaking.
Each half of the AD827 serves as an I/V converter and converts
the output current of one of the two multipliers in the AD539
into an output voltage. Each of the AD539’s two multipliers
contains two internal 6 k
feedback resistors; one is connected
between the CH1 output and Z1, the other between the CH1
output and W1. Likewise, in the CH2 multiplier, one of the
feedback resistors is connected between CH2 and Z2 and the
other is connected between CH2 and Z2. In Figure 25, Z1 and
W1 are tied together, as are Z2 and W2, providing a 3 k
feedback resistor for the op amp. The 2 pF capacitors connected
between the AD539’s W1 and CH1 and W2 and CH2 pins are
in parallel with the feedback resistors and thus reduce peaking
in the VCA’s frequency response. Increasing the values of C3
and C4 can further reduce the peaking at the expense of
reduced bandwidth. The 1.25 mA full-scale output current of
the AD539 and the 3 k
feedback resistor set the full-scale
output voltage of each multiplier at 3.25 V p-p.
Current limiting in the AD827 (typically 30 mA) limits the out-
put voltage in this application to about 3 V p-p across a 100
load. Driving a 50
reverse-terminated load divides this value
by two, limiting the maximum signal delivered to a 50
load to
about 1.5 V p-p, which suffices for video signal levels. The
dynamic range of this circuit is approximately 55 dB and is
primarily limited by feedthrough at low input levels and by the
maximum output voltage at high levels.
Guidelines for Grounding and Bypassing
When designing practical high frequency circuits using the AD827,
some special precautions are in order. Both short interconnection
leads and a large ground plane are needed whenever possible to
provide low resistance, low inductance circuit paths. One should
remember to minimize the effects of capacitive coupling
between circuits. Furthermore, IC sockets should be avoided.
Feedback resistors should be of a low enough value that the
time constant formed with stray circuit capacitances at the
amplifier summing junction will not limit circuit performance.
As a rule of thumb, use feedback resistor values that are less
than 5 k
. If a larger resistor value is necessary, a small (<10 pF)
feedback capacitor in parallel with the feedback resistor may be
used. The use of 0.1
F ceramic disc capacitors is recommended
for bypassing the op amp’s power supply leads.
A TWO-CHIP VOLTAGE-CONTROLLED AMPLIFIER
(VCA) WITH EXPONENTIAL RESPONSE
Voltage-controlled amplifiers are often used as building blocks
in automatic gain control systems. Figure 25 shows a two-chip
VCA built using the AD827 and the AD539, a dual, current-
output multiplier. As configured, the circuit has its two
Figure 25. A Wide Range Voltage-Controlled
Amplifier Circuit
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