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參數(shù)資料
| 型號： | AD8300ANZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT SERIAL 8DIP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 設(shè)置時間： | 14µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 5.1mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 1 電壓，單極 |
| 采樣率（每秒）： | 71k |
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD8300
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1999
FUNCTIONAL BLOCK DIAGRAM
VDD
VOUT
GND
CLR
LD
CS
CLK
SDI
AD8300
12
12-BIT
DAC
REF
DAC
REGISTER
EN
SERIAL
REGISTER
+3 Volt, Serial Input
Complete 12-Bit DAC
FEATURES
Complete 12-Bit DAC
No External Components
Single +3 Volt Operation
0.5 mV/Bit with 2.0475 V Full Scale
6
s Output Voltage Settling Time
Low Power: 3.6 mW
Compact SO-8 1.5 mm Height Package
APPLICATIONS
Portable Communications
Digitally Controlled Calibration
Servo Controls
PC Peripherals
GENERAL DESCRIPTION
The AD8300 is a complete 12-bit, voltage-output digital-to-
analog converter designed to operate from a single +3 volt sup-
ply. Built using a CBCMOS process, this monolithic DAC
offers the user low cost, and ease-of-use in single-supply +3 volt
systems. Operation is guaranteed over the supply voltage range
of +2.7 V to +5.5 V making this device ideal for battery oper-
ated applications.
The 2.0475 V full-scale voltage output is laser trimmed to
maintain accuracy over the operating temperature range of the
device. The binary input data format provides an easy-to-use
one-half-millivolt-per-bit software programmability. The voltage
outputs are capable of sourcing 5 mA.
A double buffered serial data interface offers high speed, three-
wire, DSP and microcontroller compatible inputs using data in
(SDI), clock (CLK) and load strobe (
LD) pins. A chip select
(
CS) pin simplifies connection of multiple DAC packages by
enabling the clock input when active low. Additionally, a
CLR
input sets the output to zero scale at power on or upon user
demand.
The AD8300 is specified over the extended industrial (–40
°C to
+85
°C) temperature range. AD8300s are available in plastic
DIP, and low profile 1.5 mm height SO-8 surface mount packages.
3.0
2.8
2.0
0.01
10
0.1
1.0
2.6
2.4
2.2
OUTPUT LOAD CURRENT – mA
MINIMUM
SUPPLY
VOLTAGE
–
Volts
PROPER OPERATION
WHEN VDD SUPPLY
VOLTAGE ABOVE
CURVE
VFS
1 LSB
DATA = FFFH
TA = +25 C
Figure 1. Minimum Supply Voltage vs. Load
1.00
0.75
–1.00
0
4096
1024
2048
0.50
3072
0.25
0.00
–0.25
–0.50
–0.75
DIGITAL INPUT CODE – Decimal
INL
LINEARITY
ERROR
–
LSB
VDD = +2.7V
TA = –40 C, +25 C, +125 C
= –40 C
= +25 C
= +125 C
Figure 2. Linearity Error vs. Digital Code and Temperature
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