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參數(shù)資料
| 型號： | AD830JRZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/20頁 |
| 文件大小： | 0K |
| 描述： | IC VIDEO DIFF AMP HS 8-SOIC T/R |
| 標準包裝： | 2,500 |
| 應(yīng)用： | 差分 |
| 電路數(shù)： | 1 |
| -3db帶寬： | 85MHz |
| 轉(zhuǎn)換速率： | 360 V/µs |
| 電流 - 電源： | 14.5mA |
| 電流 - 輸出 / 通道： | 50mA |
| 電壓 - 電源，單路/雙路(±)： | 8 V ~ 33 V，±4 V ~ 16.5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
AD830
Rev. C | Page 11 of 20
THEORY OF OPERATION
TRADITIONAL DIFFERENTIAL AMPLIFICATION
In the past, when differential amplification was needed to reject
common-mode signals superimposed with a desired signal,
most often the solution used was the classic op amp based
difference amplifier shown in Figure 24. The basic function
VO = V1 V2 is simply achieved, but the overall performance is
poor and the circuit possesses many serious problems that make
it difficult to realize a robust design with moderate to high
levels of performance.
V1
VOUT
V2
R1
R2
R3
R4
ONLY IF R1 = R2 = R3 = R4
DOES VOUT = V1 – V2
00
88
1-
0
24
Figure 24. Op Amp Based Difference Amplifier
PROBLEMS WITH THE OP AMP BASED APPROACH
Low common-mode rejection ratio (CMRR)
Low impedance inputs
CMRR highly sensitive to the value of source R
Different input impedance for the + and input
Poor high frequency CMRR
Requires very highly matched resistors, R1 to R4, to achieve
high CMRR
Halves the bandwidth of the op amp
High power dissipation in the resistors for large common-
mode voltage
AD830 FOR DIFFERENTIAL AMPLIFICATION
The AD830 amplifier was specifically developed to solve the
listed problems with the discrete difference amplifier approach.
Its topology, discussed in detail in the Understanding the AD830
Topology section, by design acts as a difference amplifier. The
circuit of Figure 25 shows how simply the AD830 is configured
to produce the difference of the two signals, V1 and V2, in which
the applied differential signal is exactly reproduced at the
output relative to a separate output common. Any common-
mode voltage present at the input is removed by the AD830.
V1
VOUT
IY
IX
V2
A = 1
V
I
→
V
I
→
VOUT = V1 – V2
00
88
1-
0
25
Figure 25. AD830 as a Difference Amplifier
ADVANTAGEOUS PROPERTIES OF THE AD830
High common-mode rejection ratio (CMRR)
High impedance inputs
Symmetrical dynamic response for +1 and 1 Gain
Low sensitivity to the value of source R
Equal input impedance for the + and input
Excellent high frequency CMRR
No halving of the bandwidth
Constant power distortion versus common-mode voltage
Highly matched resistors not needed
UNDERSTANDING THE AD830 TOPOLOGY
The AD830 represents Analog Devices first amplifier product to
embody a powerful alternative amplifier topology. Referred to
as active feedback, the topology used in the AD830 provides
inherent advantages in the handling of differential signals,
differing system commons, level shifting, and low distortion,
high frequency amplification. In addition, it makes possible the
implementation of many functions not realizable with single op
amp circuits or superior to op amp based equivalent circuits.
With this in mind, it is important to understand the internal
structure of the AD830.
The topology, reduced to its elemental form, is shown in Figure 26.
Nonideal effects, such as nonlinearity, bias currents, and limited
full scale, are omitted from this model for simplicity but are
discussed later. The key feature of this topology is the use of
two, identical voltage-to-current converters, GM, that make up
input and feedback signal interfaces. They are labeled with
inputs VX and VY, respectively. These voltage-to-current
converters possess fully differential inputs, high linearity, high
input impedance, and wide voltage range operation. This
enables the part to handle large amplitude differential signals; it
also provides high common-mode rejection, low distortion, and
negligible loading on the source. The label, GM, is meant to
convey that the transconductance is a large signal quantity,
unlike in the front end of most op amps. The two GM stage
current outputs, IX and IY, sum together at a high impedance
node, which is characterized by an equivalent resistance and
capacitance connected to an ac common. A unity voltage gain
stage follows the high impedance node to provide buffering
from loads. Relative to either input, the open-loop gain, AOL, is
set by the transconductance, GM, working into the resistance,
RP; AOL = GM × RP. The unity gain frequency, ω0 dB, for the open-
loop gain is established by the transconductance, GM, working
into the capacitance, CC; ω0 dB = GM/CC. The open-loop
description of the AD830 is shown below for completeness.
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