參數(shù)資料
型號(hào)： AD8330ACPZ-RL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 6/32頁(yè)
文件大小： 0K
描述： IC AMP VGA 150MHZ LN LP 16LFCSP
標(biāo)準(zhǔn)包裝： 5,000
放大器類(lèi)型： 可變?cè)鲆?br>
電路數(shù)： 1
輸出類(lèi)型： 差分，滿(mǎn)擺幅
轉(zhuǎn)換速率： 1500 V/µs
-3db帶寬： 150MHz
電流 - 輸入偏壓： 100nA
電流 - 電源： 20mA
電壓 - 電源，單路/雙路(±)： 2.7 V ~ 6 V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 16-VFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 16-LFCSP-VQ
包裝： 帶卷 (TR)
配用： AD8330-EVALZ-ND - BOARD EVAL FOR AD8330
AD8330
Data Sheet
Rev. F | Page 14 of 32
THEORY OF OPERATION
CIRCUIT DESCRIPTION
Many monolithic variable gain amplifiers use techniques that
share common principles that are broadly classified as translinear.
This term refers to circuit cells whose functions depend directly
on the very predictable properties of bipolar junction transistors,
notably the linear dependence of their transconductance on collec-
tor current. Since the discovery of these cells in 1967, and their
commercial exploitation in products developed during the early
1970s, accurate wide bandwidth analog multipliers, dividers,
and variable gain amplifiers have invariably employed translinear
principles.
Although these techniques are well understood, the realization
of a high performance variable gain amplifier (VGA) requires
special technologies and attention to many subtle details in
its design. The AD8330 is fabricated on a proprietary silicon-
on-insulator, complementary bipolar IC process and draws
on decades of experience in developing many leading edge
products using translinear principles to provide an unprecedented
level of versatility.
Figure 45 shows a basic representative cell comprising just four
transistors. This, or a very closely related form, is at the heart
of most translinear multipliers, dividers, and VGAs. The key
concepts are as follows:
First, the ratio of the currents in the left-hand and right-hand
pairs of transistors is identical, represented by the modulation
factor, x, with values between 1 and +1. Second, the input
signal is arranged to modulate the fixed tail current, ID, to cause
the variable value of x, introduced in the left-hand pair, to be
replicated in the right-hand pair, and, thus, generate the output
by modulating its nominally fixed tail current, IN. Third, the
current gain of this cell is exactly G = IN/ID over many decades
of variable bias current.
In practice, the realization of the full potential of this circuit
involves many other factors, but these three elementary ideas
remain essential.
By varying IN, the overall function is that of a two-quadrant
analog multiplier, exhibiting a linear relationship to both the
signal modulation factor (x) and this numerator current. On
the other hand, by varying ID, a two-quadrant analog divider
is realized, having a hyperbolic gain function with respect to
the input factor, x, controlled by this denominator current. The
AD8330 exploits both modes of operation. However, because a
hyperbolic gain function is generally of less value than one in
which the decibel gain is a linear function of a control input, a
special interface is included to provide either increasing or
decreasing exponential control of ID.
INPUT IS xlD
DENOMINATOR
BIAS CURRENT
ID
Q1
Q2
Q4
Q3
(1–x) ID
2
+
–
LOOP
AMPLIFIER
(1–x) IN
2
NUMERATOR
BIAS CURRENT
IN
OUTPUT IS xlN
G = IN/ID
(1+x) IN
2
(1–x) ID
2
03217-
046
Figure 45. Basic Core
COMM
OPHI
INLO
OPLO
INHI
VPSI
VPSO
CMOP
MODE
VDBS
CMGN
VMAG
OFST
R
T
N
C
L
B
N
E
VPOS
BIAS AND
VREF
GAIN INTERFACE
CM MODE AND
OUTPUT
STAGES
OUTPUT
CONTROL
VGA CORE
AD8330
03217-
047
Figure 46. Block Schematic
Overall Structure
Figure 46 shows a block schematic of the AD8330 locating the
key sections. More detailed descriptions of its structure and
features are provided throughout the Theory of Operation
section; however, Figure 46 provides a general overview of its
capabilities.
The VGA core contains a more elaborate version of the cell
shown in Figure 45. The current, ID, is controlled exponentially
(linear-in-decibels) through the decibel gain interface at
Pin VDBS and its local common, Pin CMGN. The gain span
(that is, the decibel difference between maximum and
minimum values) provided by this control function is slightly
more than 50 dB. The absolute gain from input to output is a
function of source and load impedance, and depends on the
voltage on a second gain control pin (VMAG), explained in the
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