VOUT 10 DECL 9" />
參數(shù)資料
型號(hào)： AD8367ARUZ-RL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 9/24頁(yè)
文件大?。?/td> 0K
描述： IC AMP VGA 14TSSOP
標(biāo)準(zhǔn)包裝： 1,000
系列： X-AMP®
放大器類(lèi)型： 可變?cè)鲆?br>
電路數(shù)： 1
-3db帶寬： 500MHz
電流 - 輸入偏壓： 27µA
電流 - 電源： 26mA
電壓 - 電源，單路/雙路(±)： 2.7 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 14-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 14-TSSOP
包裝： 帶卷 (TR)
AD8367
Rev. A | Page 17 of 24
0
2710-
038
VOUT 10
DECL 9
OCOM 8
C5
10nF
GAIN
5
DETO
6
ICOM
7
Vg
R5
10k
Ω
AD8367
U1
ICOM
1
ICOM 14
ENBL
2
HPFL 13
INPT
3
VPSI 12
MODE
4
VPSO 11
INPUT
J1
10nF
R6
57.6
Ω
CHP
10nF
RHP
100
Ω
VAGC
AD820
U3
2
3
6
4
7
VSET
5V
0.1
μF
R3
82k
Ω
20pF
C1
3.3nF
AD8361
U2
PWDN
4
COMM
5
RFIN
3
FLTR
6
IREF
2
VRMS 7
VPOS
1
SREF
8
R2
150k
Ω
R4
33k
Ω
R1
200k
Ω
10nF
0.1
μF
2.2
Ω
12k
Ω
C2
0.27
μF
Vrms
VOUT INTO A
200
Ω LOAD
5V
Figure 38. Example of Using an External Detector to Form an AGC Loop
Note that in this circuit the AD8367’s MODE pin must be
pulled high to obtain correct feedback polarity because the
integrator inverts the polarity of the feedback signal.
The relationship between the setpoint voltage and the rms
output voltage of the AD8367 is
(
)
7.5
225
×
+
×
=
R1
V
SET
RMS
OUT
(6)
where 225 is the input resistance of the AD8361 and 7.5 is its
conversion gain. For R1 = 200 Ω, this reduces to VOUT –RMS = VSET
× 0.25.
Capacitor C2 sets the averaging time for the rms detector. This
should be made long enough to provide sufficient smoothing of
the detector’s output in the presence of the modulation on the
RF signal. A level fluctuation of less than 1 dB (<5% to 10%) p-p
at the AD8361’s output is a reasonable value. A considerably
longer time constant needlessly lowers the AGC bandwidth,
while a short time constant can degrade the accuracy of the
true-rms measurement process. Components C1, R2, and R3
set the control loop’s bandwidth and stability. The maximum
stable loop bandwidth is limited by the rms detector’s averaging
time constant as previously discussed.
For an input signal consisting of a 4.096 MS/s QPSK modulated
carrier, the relationship between VSET and the output power for
this setup is shown in Figure 39. The exponential shape reflects
the linear-in-magnitude response of the AD8361. The adjacent
channel power ratio (ACPR) as a function of output power is
illustrated in Figure 40. The minima occur where the distortion
and integrated noise powers cross over.
The component values shown in Figure 38 were chosen for a
64-QAM signal at 500 kS/s at a carrier frequency of 150 MHz.
The response time of the loop as shown is roughly 5 ms for
an abrupt input level change of 40 dB. Figure 41 shows the
dynamic performance of the loop with a step-modulated
CW signal applied to the input for a VSET of about 1 V.
For a linear-in-dB response, detectors such as the AD8318 or
the AD8362 can be used in place of the AD8361.
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
–20
10
5
0
–5
–10
–15
02710-039
V
SET
(V
)
10MHz
380MHz
POUT (dBm INTO 200
Ω)
Figure 39. AGC Setpoint Voltage vs. Output Power
(QPSK: 4.096 MS/s; α = 0.22; 1 User)
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參數(shù)描述
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