- 您現(xiàn)在的位置：買賣IC網 > PDF目錄9293 > AD8402AR1-REEL (Analog Devices Inc)IC POT DIG DUAL 1K 8BIT 14SOIC PDF資料下載
參數(shù)資料
| 型號： | AD8402AR1-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC POT DIG DUAL 1K 8BIT 14SOIC |
| 標準包裝： | 2,500 |
| 接片： | 256 |
| 電阻（歐姆）： | 1k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標準值 500 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | 3 線 SPI（芯片選擇） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 14-SOICN |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
AD8400/AD8402/AD8403
Rev. E | Page 21 of 32
Like a mechanical potentiometer, RDAC is symmetrical. The
resistance between the Wiper W and Terminal A also produces
a digitally controlled complementary resistance, RWA. When
these terminals are used, the B terminal can be tied to the wiper
or left floating. RWA starts at the maximum and decreases as the
data loaded into the RDAC latch increases. The general transfer
equation for this RWA is
()
W
AB
WA
R
D
R
+
×
=
256
(3)
where D is the data loaded into the 8-bit RDAC# latch, and RAB
is the nominal end-to-end resistance.
For example, when the B terminal is either open-circuited or
tied to the Wiper W, the following RDAC latch codes result in
the following RWA (for the 10 kΩ version):
Table 11.
D (Dec)
RWA (
)
Output State
255
89
Full-Scale
128
5,050
Midscale (RS = 0 Condition)
1
10,011
1 LSB
0
10,050
Zero-Scale
The typical distribution of RAB from channel to channel
matches within ±1%. However, device-to-device matching
is process lot dependent and has a ±20% variation. The tem-
perature coefficient, or the change in RAB with temperature,
is 500 ppm/°C.
The wiper-to-end-terminal resistance temperature coefficient
has the best performance over the 10% to 100% of adjustment
range where the internal wiper contact switches do not con-
tribute any significant temperature related errors. The graph in
the potentiometer with codes below 32 results in the larger
temperature coefficients plotted.
PROGRAMMING THE POTENTIOMETER DIVIDER
Voltage Output Operation
The digital potentiometer easily generates an output voltage
proportional to the input voltage applied to a given terminal.
For example, connecting the A terminal to 5 V and the B termi-
nal to ground produces an output voltage at the wiper starting
at 0 V up to 1 LSB less than 5 V. Each LSB is equal to the voltage
applied across the A to B terminals divided by the 256-position
resolution of the potentiometer divider. The general equation
defining the output voltage with respect to ground for any given
input voltage applied to the A to B terminals is
B
AB
W
V
D
V
+
×
=
256
(4)
Operation of the digital potentiometer in the voltage divider
mode results in more accurate operation over temperature.
Here the output voltage is dependent on the ratio of the internal
resistors, not the absolute value; therefore, the temperature drift
improves to 15 ppm/°C.
At the lower wiper position settings, the potentiometer divider
temperature coefficient increases because the contribution of
the CMOS switch wiper resistance becomes an appreciable
portion of the total resistance from the B terminal to the
Wiper W. See Figure 17 for a plot of potentiometer tempco
performance vs. code setting.
DIGITAL INTERFACING
The AD8400/AD8402/AD8403 contain a standard SPI-
compatible, 3-wire, serial input control interface. The three
inputs are clock (CLK), chip select (CS), and serial data input
(SDI). The positive-edge sensitive CLK input requires clean
transitions to avoid clocking incorrect data into the serial input
register. For the best result, use logic transitions faster than
1 V/μs. Standard logic families work well. If mechanical switches
are used for product evaluation, they should be debounced by
a flip-flop or other suitable means. The block diagrams in
, and
show the internal digital
circuitry in more detail. When
CS is taken active low, the clock
loads data into the 10-bit serial register on each positive clock
edge (see
).
RDAC
LATCH
NO. 1
GND
A1
W1
B1
VDD
AD8400
CS
CLK
8
D7
D0
EN
ADDR
DEC
A1
A0
SDI
DI
D0
D7
10-BIT
SER
REG
0
10
92
-0
45
Figure 46. AD8400 Block Diagram
RDAC
LATCH
NO. 1
R
AGND
RS
A1
W1
B1
VDD
AD8402
CS
CLK
D7
D0
RDAC
LATCH
NO. 2
R
A4
W4
B4
D7
D0
EN
ADDR
DEC
A1
A0
SDI
DI
10-BIT
SER
REG
D0
SHDN
DGND
D7
8
01
09
2-
04
6
Figure 47. AD8402 Block Diagram
相關PDF資料 |
PDF描述 |
|---|---|
| AD5252BRU50-RL7 | IC DCP DUAL 50K 256POS 14TSSOP |
| VI-263-MY-F4 | CONVERTER MOD DC/DC 24V 50W |
| AD5252BRU100-RL7 | IC DCP DUAL 100K 256POS 14TSSOP |
| AD5252BRU10-RL7 | IC DCP DUAL 10K 256POS 14TSSOP |
| DS1100Z-500 | IC DELAY LINE 5TAP 500NS 8-SOIC |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD8402AR50 | 功能描述:IC DGTL POT 8BIT 50K 2CH 14-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據采集 - 數(shù)字電位器 系列:- 標準包裝:3,000 系列:DPP 接片:32 電阻（歐姆）:10k 電路數(shù):1 溫度系數(shù):標準值 300 ppm/°C 存儲器類型:非易失 接口:3 線串行（芯片選擇，遞增，增/減） 電源電壓:2.5 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WFDFN 裸露焊盤 供應商設備封裝:8-TDFN（2x3） 包裝:帶卷 (TR) |
| AD8402AR50-REEL | 功能描述:IC POT DIG DUAL 50K 8BIT 14SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據采集 - 數(shù)字電位器 系列:- 標準包裝:3,000 系列:DPP 接片:32 電阻（歐姆）:10k 電路數(shù):1 溫度系數(shù):標準值 300 ppm/°C 存儲器類型:非易失 接口:3 線串行（芯片選擇，遞增，增/減） 電源電壓:2.5 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WFDFN 裸露焊盤 供應商設備封裝:8-TDFN（2x3） 包裝:帶卷 (TR) |
| AD8402ARU1 | 制造商:Analog Devices 功能描述:Digital Potentiometer 256POS 1KOhm Dual 14-Pin TSSOP |
| AD8402ARU10 | 功能描述:IC POT DIG DUAL 10K 8BIT 14TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據采集 - 數(shù)字電位器 系列:- 標準包裝:3,000 系列:DPP 接片:32 電阻（歐姆）:10k 電路數(shù):1 溫度系數(shù):標準值 300 ppm/°C 存儲器類型:非易失 接口:3 線串行（芯片選擇，遞增，增/減） 電源電壓:2.5 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WFDFN 裸露焊盤 供應商設備封裝:8-TDFN（2x3） 包裝:帶卷 (TR) |
| AD8402ARU100 | 功能描述:IC POT DGTL DUAL 100K 8B 14TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據采集 - 數(shù)字電位器 系列:- 標準包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標準值 ±300 ppm/°C 存儲器類型:非易失 接口:I²C（設備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:14-TSSOP 包裝:帶卷 (TR) |
發(fā)布緊急采購，3分鐘左右您將得到回復。