+VS
參數(shù)資料
型號: AD8426BCPZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 14/28頁
文件大?。?/td> 0K
描述: IC AMP INSTR RR 1.5MHZ 16LFCSP
標準包裝: 1,500
放大器類型: 儀表
電路數(shù): 2
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 0.6 V/µs
-3db帶寬: 1MHz
電流 - 輸入偏壓: 20nA
電壓 - 輸入偏移: 100µV
電流 - 電源: 350µA
電流 - 輸出 / 通道: 13mA
電壓 - 電源,單路/雙路(±): 2.2 V ~ 36 V,±1.35 V ~ 18 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-VQFN,CSP
供應(yīng)商設(shè)備封裝: 16-LFCSP(4x4)
包裝: 帶卷 (TR)
AD8426
Rev. 0 | Page 21 of 28
THEORY OF OPERATION
A3
R2
24.7k
R1
24.7k
A1
A2
Q2
Q1
–IN
+IN
+VS
–VS
R3
50k
R4
50k
R5
50k
RB
+VS
–VS
VOUT
REF
NODE 1
NODE 2
RG
VBIAS
+VS
–VS
+VS
–VS
NODE 4
NODE 3
R6
50k
DIFFERENCE
AMPLIFIER STAGE
GAIN STAGE
ESD AND
OVERVOLTAGE
PROTECTION
ESD AND
OVERVOLTAGE
PROTECTION
–VS
0
94
90
-0
03
Figure 61. Simplified Schematic
ARCHITECTURE
The AD8426 is based on the classic 3-op-amp topology. This
topology has two stages: a gain stage (preamplifier) to provide
differential amplification, followed by a difference amplifier stage
to remove the common-mode voltage. Figure 61 shows a simplified
schematic of one of the instrumentation amplifiers in the AD8426.
The first stage works as follows. To maintain a constant voltage
across the bias resistor, RB, A1 must keep Node 3 at a constant
diode drop above the positive input voltage. Similarly, A2 keeps
Node 4 at a constant diode drop above the negative input voltage.
Therefore, a replica of the differential input voltage is placed
across the gain setting resistor, RG. The current that flows across
this resistance must also flow through the R1 and R2 resistors,
creating a gained differential signal between the A2 and A1 out-
puts. Note that, in addition to a gained differential signal, the
original common-mode signal, shifted up by a diode drop, is
also still present.
The second stage is a difference amplifier, composed of A3 and
four 50 kΩ resistors. The purpose of this stage is to remove the
common-mode signal from the amplified differential signal.
The transfer function of the AD8426 is
VOUT = G × (VIN+ VIN) + VREF
where:
G
R
G
49.4
1 +
=
GAIN SELECTION
Placing a resistor across the RG terminals sets the gain of the
AD8426. The gain can be calculated by referring to Table 11
or by using the following gain equation:
1
49.4
=
G
R
G
Table 11. Gains Achieved Using 1% Resistors
1% Standard Table Value of RG
Calculated Gain
49.9 kΩ
1.990
12.4 kΩ
4.984
5.49 kΩ
9.998
2.61 kΩ
19.93
1.00 kΩ
50.40
499 Ω
100.0
249 Ω
199.4
100 Ω
495.0
49.9 Ω
991.0
The AD8426 defaults to G = 1 when no gain resistor is used.
The tolerance and gain drift of the RG resistor should be added
to the AD8426 specifications to determine the total gain accu-
racy of the system. When the gain resistor is not used, gain
error and gain drift are minimal.
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