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參數(shù)資料
型號(hào): AD8582AR
廠商: Analog Devices Inc
文件頁數(shù): 6/8頁
文件大?。?/td> 0K
描述: IC DAC 12BIT DUAL 5V 24-SOIC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 31
設(shè)置時(shí)間: 16µs
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
功率耗散(最大): 35mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SOIC
包裝: 管件
輸出數(shù)目和類型: 2 電壓,單極
采樣率(每秒): 62.5k
AD8582–Typical Performance Characteristics
REV. 0
–6–
80
–60
–80
1
–20
–40
0
20
40
60
3
2
OUTPUT VOLTAGE – Volts
OUTPUT
CURRENT
mA
POSITIVE0
CURRENT0
LIMIT0
NEGATIVE
CURRENT
LIMIT
DATA = 800H
RL TIED TO +2V
1
10
1000
100
1
0.01
0.1
10
OUTPUT SINK CURRENT – A
OUTPUT
PULL-DOWN
VOLTAGE
mV
VDD = +5V
DATA = 000H
TA = +85°C
TA = –40°C
TA = +25°C
5
2
0
10
100
100k
10k
1k
1
3
4
OUTPUT
VOLTAGE
Volts
RL TIED TO AGND
DATA = FFFH
VDD = +5V
TA = +25°C
RL TIED TO +5V
DATA = 000H
LOAD RESISTANCE –
Figure 6. Pull-Down Voltage vs.
Output Sink Current Capability
Figure 7. IOUT vs. VOUT
Figure 5. Output Swing vs. Load
5
0
5
1
0
3
2
4
3
24
1
LOGIC VOLTAGE VALUE – Volts
SUPPLY
CURRENT
mA
VDD = +4.75V
VDD = +5V
TA = +25°C
100
0
10
100
100k
10k
1k
60
80
20
40
POWER
SUPPLY
REJECTION
dB
FREQUENCY – Hz
VDD = +5V ±200mV AC
TA = +25°C
DATA = FFFH
TIME = 100s/DIV
OUTPUT
NOISE
VOLTAGE
200
V/DIV
TA = +25°C
NBW = 630kHz
Figure 9. Supply Current vs. Logic
Input Voltage
Figure 10. Power Supply Rejection
vs. Frequency
Figure 8. Broadband Noise
2.028
2.018
2.048
2.038
0
5
TIME – 500ns/DIV
V
OUT
Volts
LD
2048
10
TO 2047
10
2.008
0
5
VDD = +5V
TA = +25°C
OUTPUT
VOLTAGE
1mV/DIV
DATA
TIME – 5s/DIV
15s
5
0
4
3
2
1
0
TIME = 20s/DIV
INPUT
OUTPUT
10
90
100
LDB
VDD = +5V
TA = +25°C
1V
20s
5V
0%
Figure 11. Midscale Transition
Performance
Figure 12. Large Signal Settling Time
Figure 13. Output Voltage Rise
Time Detail
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