VDD = 5.0 V, V
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� AD8665ARJZ-REEL7
寤犲晢锛� Analog Devices Inc
鏂囦欢闋佹暩(sh霉)锛� 10/16闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC OPAMP GP R-R 4MHZ LN SOT23-5
妯欐簴鍖呰锛� 1
鏀惧ぇ鍣ㄩ鍨嬶細 閫氱敤
闆昏矾鏁�(sh霉)锛� 1
杓稿嚭椤炲瀷锛� 婊挎摵骞�
杞�(zhu菐n)鎻涢€熺巼锛� 3.5 V/µs
澧炵泭甯跺绌嶏細 4MHz
闆绘祦 - 杓稿叆鍋忓锛� 0.2pA
闆诲 - 杓稿叆鍋忕Щ锛� 600µV
闆绘祦 - 闆绘簮锛� 1.15mA
闆绘祦 - 杓稿嚭 / 閫氶亾锛� 140mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� 5 V ~ 16 V锛�±2.5 V ~ 8 V
宸ヤ綔婧害锛� -40°C ~ 125°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� SC-74A锛孲OT-753
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 SOT-23-5
鍖呰锛� 妯欐簴鍖呰
鐢�(ch菐n)鍝佺洰閷勯爜闈細 767 (CN2011-ZH PDF)
鍏跺畠鍚嶇ū锛� AD8665ARJZ-REEL7DKR
AD8665/AD8666/AD8668
Rev. B | Page 3 of 16
SPECIFICATIONS
VDD = 5.0 V, VCM = VDD/2, TA = 25oC, unless otherwise noted.
Table 1.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
VCM = 2.5 V
0.7
2.5
mV
VCM = 0.1 V to +3.0 V
3.0
mV
40掳C < TA < +125掳C
5.0
mV
Offset Voltage Drift
螖VOS/螖T
40掳C < TA < +125掳C
3.0
10
渭V/掳C
Input Bias Current
IB
0.2
1
pA
40掳C < TA < +125掳C
550
pA
Input Offset Current
IOS
0.1
0.5
pA
40掳C < TA < +125掳C
70
pA
Input Voltage Range
VCM
0.1
+3.0
V
Common-Mode Rejection Ratio
CMRR
VCM = 0.1 V to +3.0 V
84
100
dB
40掳C < TA < +125掳C
79
dB
Large-Signal Voltage Gain
AVO
RL = 2 k惟, VO = 0.5 V to 4.5 V
68
145
V/mV
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
IOUT = 1 mA
4.88
4.93
V
40掳C < TA < +125掳C
4.86
V
Output Voltage Low
VOL
IOUT = 1 mA
50
85
mV
40掳C < TA < +125掳C
105
mV
Short-Circuit Output Current
ISC
卤19
mA
Closed-Loop Output Impedance
ZOUT
At 1 MHz, AV = 1
50
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
VDD = 5.0 V to 16 V
98
115
dB
40掳C < TA < +125掳C
94
dB
Supply Current per Amplifier
ISY
1.1
1.4
mA
40掳C < TA < +125掳C
2.0
mA
DYNAMIC PERFORMANCE
Slew Rate
SR
RL = 2 k惟
3.5
V/渭s
Gain Bandwidth Product
GBP
4
MHz
Phase Margin
M
70
Degrees
NOISE PERFORMANCE
Peak-to-Peak Noise
en p-p
0.1 Hz to 10 Hz
2.4
渭V p-p
Voltage Noise Density
en
f = 1 kHz
10
nV/鈭欻z
f = 10 kHz
8
nV/鈭欻z
Channel Separation
CS
f = 10 kHz
115
dB
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
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鍙冩暩(sh霉)鎻忚堪
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