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參數(shù)資料
| 型號： | AD8801AR |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 8BIT OCTAL W/SD 16-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 48 |
| 系列： | TrimDAC® |
| 設(shè)置時(shí)間： | 600ns |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 8 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 27.5mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 8 電壓，單極 |
| 采樣率（每秒）： | 1.7M |
REV. A
–8–
AD8801/AD8803
HOURS OF OPERATION AT 150
°C
0.04
–0.04
0
600
150
300
450
0
–0.02
0.02
VDD = +4.5V
VREF = +4.5V
SS = 162 PCS
x + 2
σ
CHANGE
IN
FULL-SCALE
ERROR
–
LSB
x
x – 2
σ
Figure 19. Full-Scale Error Accelerated by Burn-In
HOURS OF OPERATION AT 150
°C
1.0
INPUT
RESISTANCE
DRIFT
–
k
–1.0
0
600
150
300
450
0
–0.5
0.5
VDD = +4.5V
VREF = +4.5V
CODE = 55H
SS = 162 PCS
x + 2
σ
x
x – 2
σ
Figure 20. REF Input Resistance Accelerated by Burn-In
AD8801/
AD8803
VDD
DGND
10F
0.1F
+
+5V
Figure 22. Recommended Supply Bypassing for the
AD8801/AD8803
Buffering the AD8801/AD8803 Output
In many cases, the nominal 5 k
output impedance of the
AD8801/AD8803 is sufficient to drive succeeding circuitry. If a
lower output impedance is required, an external amplifier can
be added. Several examples are shown in Figure 23. One ampli-
fier of an OP291 is used as a simple buffer to reduce the output
resistance of DAC A. The OP291 was chosen primarily for its
rail-to-rail input and output operation, but it also offers opera-
tion to less than 3 V, low offset voltage, and low supply current.
The next two DACs, B and C, are configured in a summing ar-
rangement where DAC C provides the coarse output voltage
setting and DAC B can be used for fine adjustment. The inser-
tion of R1 in series with DAC B attenuates its contribution to
the voltage sum node at the DAC C output.
APPLICATIONS
Supply Bypassing
Precision analog products, such as the AD8801/AD8803, re-
quire a well filtered power source. Since the AD8801/AD8803
operate from a single +3 V to +5 V supply, it seems convenient
to simply tap into the digital logic power supply. Unfortunately,
the logic supply is often a switch-mode design, which generates
noise in the 20 kHz to 1 MHz range. In addition, fast logic gates
can generate glitches hundred of millivolts in amplitude due to
wiring resistances and inductances.
If possible, the AD8801/AD8803 should be powered directly
from the system power supply. This arrangement, shown in Fig-
ure 21, will isolate the analog section from the logic switching
transients. Even if a separate power supply trace is not available,
however, generous supply bypassing will reduce supply-line in-
duced errors. Local supply bypassing consisting of a 10
F tan-
talum electrolytic in parallel with a 0.1
F ceramic capacitor is
recommended (Figure 22).
TTL/CMOS
LOGIC
CIRCUITS
+5V
POWER SUPPLY
10F
TANT
0.1F
AD8801/
AD8803
+
Figure 21. Use Separate Traces to Reduce Power Supply
Noise
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