參數(shù)資料
型號: AD9058AKD
廠商: Analog Devices Inc
文件頁數(shù): 10/11頁
文件大?。?/td> 0K
描述: IC ADC 8BIT DUAL 50MSPS 48-CDIP
標準包裝: 7
位數(shù): 8
采樣率(每秒): 50M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 960mW
電壓電源: 模擬和數(shù)字,雙 ±
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 48-CDIP(0.600",15.24mm)
供應商設備封裝: 48-CDIP 側(cè)面銅焊焊接蓋
包裝: 管件
輸入數(shù)目和類型: 2 個單端,單極;2 個單端,雙極
REV.
AD9058
–8–
AD9058 in through-hole PCB designs, use the AD9058AJD/AKD
with individual pin sockets (AMP Part No. 6-330808-0). Alterna-
tively, surface-mount AD9058 units can be mounted in a
through-hole socket (Circuit Assembly Corporation, Irvine, Cali-
fornia Part No. CA-44SPC-T).
AD9058 APPLICATIONS
Combining two ADCs in a single package is an attractive alterna-
tive in a variety of systems when cost, reliability, and space are
important considerations. Different systems emphasize particular
specifications, depending on how the part is used.
In high density digital radio communications, a pair of high
speed ADCs are used to digitize the in-phase (I) and quadrature
(Q) components of a modulated signal. The signal presented to
each ADC in this type of system consists of message-dependent
amplitudes varying at the symbol rate, which is equal to the
sample rates of the converters.
t
A = APERTURE TIME
t
V = DATA DELAY OF PRECEDING ENCODE
t
PD = OUTPUT PROPAGATION DELAY
ANALOG
INPUT
ENCODE
D0–D7
VALID DATA
FOR N–1
VALID DATA
FOR N
VALID DATA
FOR N+1
DATA
CHANGING
t
V
t
A
N
N+1
N+2
t
PD
Figure 4. Timing Diagram
Figure 5 shows what the analog input to the AD9058 would
look like when observed relative to the sample clock. Signal-to-
noise ratio (SNR), transient response, and sample rate are all
critical specifications in digitizing this “eye pattern.”
ANALOG
INPUT
SAMPLE
CLOCK
Figure 5. I and Q Input Signals
Receiver sensitivity is limited by the SNR of the system. For the
ADC, SNR is measured in the frequency domain and calculated
with a Fast Fourier Transform (FFT). The signal-to-noise ratio
equals the ratio of the fundamental component of the signal
(rms amplitude) to the rms level of the noise. Noise is the sum
of all other spectral components, including harmonic distortion,
but excluding dc.
Although the signal being sampled does not have a significant
slew rate at the instant it is encoded, dynamic performance of
the ADC and the system is still critical. Transient response is
the time required for the AD9058 to achieve full accuracy when
a step function input is applied. Overvoltage recovery time is the
interval required for the AD9058 to recover to full accuracy after an
overdriven analog input signal is reduced to its input range.
Time domain performance of the ADC is also extremely important
in digital oscilloscopes. When a track-/sample-and-hold is used
ahead of the ADC, its operation becomes similar to that described
above for receivers.
The dynamic response to high frequency inputs can be described by
the effective number of bits (ENOB). The effective number of
bits is calculated with a sine wave curve fit and is expressed as:
ENOB
N
LOG
Error measured
Error ideal
=
()
( )
[]
2
where N is the resolution (number of bits) and measured error is
actual rms error calculated from the converter’s outputs with
a pure sine wave applied as the input.
Maximum conversion rate is defined as the encode (sample)
rate at which SNR of the lowest frequency analog test signal
drops no more than 3 dB below the guaranteed limit.
HARMONIC
DIST
OR
TION
dB
60
55
50
45
40
35
INPUT FREQUENCY – MHz
0.1
1
10
100
30
+25 C
–55 C
+125 C
Figure 6. Harmonic Distortion vs. Analog Input Frequency
SIGNAL-T
O-NOISE
RA
TIO
(SNR)
dB
55
50
45
40
35
INPUT FREQUENCY – MHz
0.1
1
10
100
30
+25 C AND +125 C
–55 C
EFFECTIVE
NUMBER
OF
BITS
(ENOB)
8.0
7.2
6.4
5.5
Figure 7. Dynamic Performance vs. Analog Input
Frequency
E
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