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    參數(shù)資料
    型號(hào): AD9201ARSRL
    廠(chǎng)商: Analog Devices Inc
    文件頁(yè)數(shù): 6/20頁(yè)
    文件大?。?/td> 0K
    描述: IC ADC 10BIT 2CH 40MSPS 28-SSOP
    標(biāo)準(zhǔn)包裝: 1,500
    位數(shù): 10
    采樣率(每秒): 20M
    數(shù)據(jù)接口: 并聯(lián)
    轉(zhuǎn)換器數(shù)目: 2
    功率耗散(最大): 245mW
    電壓電源: 模擬和數(shù)字
    工作溫度: -40°C ~ 85°C
    安裝類(lèi)型: 表面貼裝
    封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
    供應(yīng)商設(shè)備封裝: 28-SSOP
    包裝: 帶卷 (TR)
    輸入數(shù)目和類(lèi)型: 4 個(gè)單端,單極;2 個(gè)差分,單極
    AD9201
    –14–
    REV. D
    At the receiver, the demodulation of a QAM signal back into its
    separate I and Q components is essentially the modulation pro-
    cess explain above but in the reverse order. A common and
    traditional implementation of a QAM demodulator is shown in
    Figure 32. In this example, the demodulation is performed in
    the analog domain using a dual, matched ADC and a quadra-
    ture demodulator to recover and digitize the I and Q baseband
    signals. The quadrature demodulator is typically a single IC
    containing two mixers and the appropriate circuitry to generate
    the necessary 90
    ° phase shift between the I and Q mixers’ local
    oscillators. Before being digitized by the ADCs, the mixed
    down baseband I and Q signals are filtered using matched ana-
    log filters. These filters, often referred to as Nyquist or Pulse-
    Shaping filters, remove images-from the mixing process and any
    out-of-band. The characteristics of the matching Nyquist filters
    are well defined to provide optimum signal-to-noise (SNR)
    performance while minimizing intersymbol interference. The
    ADC’s are typically simultaneously sampling their respective
    inputs at the QAM symbol rate or, most often, at a multiple of it
    if a digital filter follows the ADC. Oversampling and the use of
    digital filtering eases the implementation and complexity of the
    analog filter. It also allows for enhanced digital processing for
    both carrier and symbol recovery and tuning purposes. The use
    of a dual ADC such as the AD9201 ensures excellent gain,
    offset, and phase matching between the I and Q channels.
    90°C
    FROM
    PREVIOUS
    STAGE
    QUADRATURE
    DEMODULATOR
    LO
    I
    ADC
    DSP
    OR
    ASIC
    CARRIER
    FREQUENCY
    NYQUIST
    FILTERS
    Q
    ADC
    DUAL MATCHED
    ADC
    Figure 32. Typical Analog QAM Demodulator
    GROUNDING AND LAYOUT RULES
    As is the case for any high performance device, proper ground-
    ing and layout techniques are essential in achieving optimal
    performance. The analog and digital grounds on the AD9201
    have been separated to optimize the management of return
    currents in a system. Grounds should be connected near the
    ADC. It is recommended that a printed circuit board (PCB) of
    at least four layers, employing a ground plane and power planes,
    be used with the AD9201. The use of ground and power planes
    offers distinct advantages:
    1. The minimization of the loop area encompassed by a signal
    and its return path.
    2. The minimization of the impedance associated with ground
    and power paths.
    3. The inherent distributed capacitor formed by the power plane,
    PCB insulation and ground plane.
    These characteristics result in both a reduction of electro-
    magnetic interference (EMI) and an overall improvement in
    performance.
    It is important to design a layout that prevents noise from cou-
    pling onto the input signal. Digital signals should not be run in
    parallel with the input signal traces and should be routed away
    from the input circuitry. Separate analog and digital grounds
    should be joined together directly under the AD9201 in a solid
    ground plane. The power and ground return currents must be
    carefully managed. A general rule of thumb for mixed signal
    layouts dictates that the return currents from digital circuitry
    should not pass through critical analog circuitry.
    Transients between AVSS and DVSS will seriously degrade
    performance of the ADC.
    If the user cannot tie analog ground and digital ground together
    at the ADC, he should consider the configuration in Figure 33.
    ANALOG
    CIRCUITS
    DIGITAL
    LOGIC
    ICs
    V
    A
    D
    DVSS
    AVSS
    A
    B
    IA
    ID
    AVDD
    DVDD
    LOGIC
    SUPPLY
    D
    A
    VIN
    CSTRAY
    GND
    A
    = ANALOG
    D
    = DIGITAL
    ADC
    IC
    DIGITAL
    CIRCUITS
    A
    Figure 33. Ground and Power Consideration
    Another input and ground technique is shown in Figure 34. A
    separate ground plane has been split for RF or hard to manage
    signals. These signals can be routed to the ADC differentially or
    single ended (i.e., both can either be connected to the driver or
    RF ground). The ADC will perform well with several hundred
    mV of noise or signals between the RF and ADC analog ground.
    DATA
    ANALOG
    GROUND
    DIGITAL
    GROUND
    LOGIC
    ADC
    AIN
    BIN
    RF
    GROUND
    -
    Figure 34. RF Ground Scheme
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