參數(shù)資料
型號： AD9212
廠商： Analog Devices, Inc.
英文描述： Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
中文描述： 八路，10位，六十五分之四十〇 MSPS的串行LVDS 1.8弗吉尼亞州/ D轉(zhuǎn)換器
文件頁數(shù)： 34/56頁
文件大?。?/td> 1840K
代理商： AD9212
AD9212
Rev. 0 | Page 34 of 56
Addr.
(Hex)
14
Parameter Name
output_mode
Bit 7
(MSB)
X
Bit 6
0 = LVDS
ANSI
(default)
1 = LVDS
low
power,
(IEEE
1596.3
similar)
X
Bit 5
X
Bit 4
X
Bit 3
X
Bit 2
Output
invert
1 = on
0 = off
(default)
Bit 1
00 = offset binary
(default)
01 = twos
complement
Bit 0
(LSB)
Default
Value
(Hex)
0x00
Default Notes/
Comments
Configures the
outputs and the
format of the
data.
15
output_adjust
X
Output driver
termination
00 = none (default)
01 = 200 Ω
10 = 100 Ω
11 = 100 Ω
X
X
X
DCO and
FCO
2× drive
strength
1 = on
0 = off
(default)
0x00
Determines
LVDS or other
output properties.
Primarily func-
tions to set the
LVDS span and
common-mode
levels in place of
an external
resistor.
On devices that
utilize global
clock divide,
determines
which phase of
the divider
output is used to
supply the
output clock.
Internal latching
is unaffected.
16
output_phase
X
X
X
X
0011 = output clock phase adjust
(0000 through 1010)
(Default: 180° relative to DATA edge)
0000 = 0° relative to DATA edge
0001 = 60° relative to DATA edge
0010 = 120° relative to DATA edge
0011 = 180° relative to DATA edge
0100 = 240° relative to DATA edge
0101 = 300° relative to DATA edge
0110 = 360° relative to DATA edge
0111 = 420° relative to DATA edge
1000 = 480° relative to DATA edge
1001 = 540° relative to DATA edge
1010 = 600° relative to DATA edge
1011 to 1111 = 660° relative to DATA edge
B3
B2
0x03
19
user_patt1_lsb
B7
B6
B5
B4
B1
B0
0x00
User-defined
pattern, 1 LSB.
User-defined
pattern, 1 MSB.
User-defined
pattern, 2 LSB.
User-defined
pattern, 2 MSB.
Serial stream
control. Default
causes MSB first
and the native
bit stream
(global).
1A
user_patt1_msb
B15
B14
B13
B12
B11
B10
B9
B8
0x00
1B
user_patt2_lsb
B7
B6
B5
B4
B3
B2
B1
B0
0x00
1C
user_patt2_msb
B15
B14
B13
B12
B11
B10
B9
B8
0x00
21
serial_control
LSB first
1 = on
0 = off
(default)
X
X
X
<10
MSPS,
low
encode
rate
mode
1 = on
0 = off
(default)
X
000 = 10 bits (default, normal bit
stream)
001 = 8 bits
010 = 10 bits
011 = 12 bits
100 = 14 bits
0x00
22
serial_ch_stat
X
X
X
X
X
Channel
output
reset
1 = on
0 = off
(default)
Channel
power-
down
1 = on
0 = off
(default)
0x00
Used to power
down individual
sections of a
converter (local).
相關(guān)PDF資料
PDF描述
AD9212-65EBZ Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9212BCPZ-40 Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9212BCPZ-65 Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9212BCPZRL7-40 Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9212BCPZRL7-65 Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
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