參數(shù)資料
型號： AD9218-65PCB
廠商： Analog Devices, Inc.
英文描述： 10-Bit, 40/65/80/105 MSPS 3 V Dual A/D Converter
中文描述： 10位，40/65/80/105 MSPS的3伏雙A / D轉(zhuǎn)換
文件頁數(shù)： 17/24頁
文件大?。?/td> 1591K
代理商： AD9218-65PCB
REV. 0
AD9218
–17–
PCB Bill of Materials
#
Qty
REFDES
Device
Package
Value
0.1
μ
F
15 pF
10
μ
F
1
2
3
6
7
29
2
7
8
3
C1, C3
–
C15, C20
–
C25, C27
–
C35
C2, C36
C16, C17, C18, C19, C26, C37, C38
J1, J2, J3, J4, J5, J6, J7, J8
P1, P4, P11
Capacitor
Capacitor
Capacitor
Connector
4-Pin Power Connector
0603
0603
TAJD
SMB
TB4
Wieland
25.531.3425.0
Z5.602.5453.0
8
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
2
8
10
2
6
2
2
8
2
2
1
2
1
2
4
2
P2, P3
R1
–
R4, R22
–
R24, R30
R5
–
R12, R34, R37
R13, R14
R15, R17, R18, R26, R29, R31
R16, R25
R19, R27
R20, R32, R33, R35, R36, R38
–
R40
R21, R28
T1, T2
U1
U2, U3
U4
U5, U6
U7, U8, U9, U10
U11, U12
HEADER40
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Transformer
AD9218
74LCX821
AD9763
74LCX86
Resistor Array
AD8138
0603
0603
0603
0603
0603
0603
0603
0603
ADT-1-1WT
LQFP48
SO24M3
LQFP48
SO14
CTS20
SO8NB
25
50
2 k
500
525
4 k
0
1 k
Minicircuits
22
NOTE
R22, R23, R24, R30, R32, R33, R35, R36, R38, R39, R40, C2, C36 not placed on board.
Data Outputs
The ADC digital outputs are latched on the board by two
LCX821s, the latch outputs are available at the two 40-pin
connectors at Pins 23
–
33 on P3 (Channel A) and Pins 23
–
33 on
P4 (Channel B). The latch output clocks (data ready) are avail-
able at Pin 4 on P3 (Channel A) and Pin 4 on P4 (Channel B).
The data ready signal on Channel B can be aligned with Clock
A input by connecting E43
–
E42 or aligned with Clock B input
by connecting E42
–
E33.
CH1
2.00V CH2 2.00V
M 10.0ns
CH4
40mV
PIN 31 (DATA)
PIN 37 (CLOCK)
T
Figure 15. Data Output and Clock at 80-Pin Connector
DAC Outputs
Each channel is reconstructed by an on-board dual channel DAC,
an AD9763. This DAC is intended to assist in debug only. It
should not be used to measure the performance of the ADC.
It is a current output DAC with on-board 50
termination
resistors. Figure 16 is representative of the DAC output with a
full-scale analog input. The scope setting was low bandwidth,
50
termination.
CH1
500mV
M 50.0ns
CH1
380mV
1
T
Figure 16. DAC Output
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