參數(shù)資料
型號(hào): AD9224-EB
廠商: Analog Devices, Inc.
英文描述: Complete 12-Bit 40 MSPS Monolithic A/D Converter
中文描述: 完整的12位40 MSPS的單片A / D轉(zhuǎn)換
文件頁(yè)數(shù): 4/24頁(yè)
文件大?。?/td> 309K
代理商: AD9224-EB
AD9224
–4–
REV. A
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9224 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS*
With
Pin Name
Respect to
AVDD
AVSS
DRVDD
DRVSS
AVSS
DRVSS
AVDD
DRVDD
REFCOM
AVSS
CLK
AVSS
Digital Outputs
DRVSS
VINA, VINB
AVSS
VREF
AVSS
SENSE
AVSS
CAPB, CAPT
AVSS
Junction Temperature
Storage Temperature
Lead Temperature (10 sec)
Min
–0.3
–0.3
–0.3
–6.5
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
Max
+6.5
+6.5
+0.3
+6.5
+0.3
AVDD + 0.3
DRVDD + 0.3
AVDD + 0.3
AVDD
+ 0.3
AVDD
+ 0.3
AVDD
+ 0.3
+150
+150
+300
Units
V
V
V
V
V
V
V
V
V
V
V
°
C
°
C
°
C
–65
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum
ratings for extended periods may affect device reliability.
t
CL
t
CH
t
C
t
OD
DATA 1
DATA
OUTPUT
INPUT
CLOCK
ANALOG
INPUT
S1
S2
S3
S4
Figure 1. Timing Diagram
PIN CONFIGURATION
28-Lead SSOP
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AD9224
OTR
(MSB) BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
CLK
(LSB) BIT 12
BIT 11
BIT 10
BIT 7
BIT 8
BIT 9
AVDD
AVSS
SENSE
VREF
REFCOM (AVSS)
CAPB
CAPT
DRVDD
DRVSS
AVDD
AVSS
CML
VINA
VINB
PIN FUNCTION DESCRIPTIONS
Pin
Number
1
2
3–12
13
14
15, 26
16, 25
17
18
19
Name
CLK
BIT 12
BIT 11–2
BIT 1
OTR
AVDD
AVSS
SENSE
VREF
REFCOM
(AVSS)
CAPB
CAPT
CML
VINA
VINB
DRVSS
DRVDD
Description
Clock Input Pin
Least Significant Data Bit (LSB)
Data Output Bit
Most Significant Data Bit (MSB)
Out of Range
+5 V Analog Supply
Analog Ground
Reference Select
Input Span Select (Reference I/O)
Reference Common
20
21
22
23
24
27
28
Noise Reduction Pin
Noise Reduction Pin
Common-Mode Level (Midsupply)
Analog Input Pin (+)
Analog Input Pin (–)
Digital Output Driver Ground
+3 V to +5 V Digital Output
Driver Supply
ORDERING GUIDE
Model
AD9224ARS
AD9224-EB
Temperature Range
–40
°
C to +85
°
C
Package Description
28-Lead Shrink Small Outline (SSOP)
Evaluation Board
Package Option
RS-28
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