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參數(shù)資料
| 型號： | AD9225 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Complete 12-Bit, 25 MSPS Monolithic A/D Converter |
| 中文描述： | 完整的12位，25 MSPS的單片機的A / D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 19/24頁 |
| 文件大?。?/td> | 321K |
| 代理商： | AD9225 |
AD9225
–19–
REV. A
this technique in digital receivers can be found in Analog
Devices Application Notes AN-301 and AN-302.
In Direct IF Down Conversion applications, one exploits the
inherent sampling process of an ADC in which an IF signal
lying outside the baseband region can be aliased back into the
baseband region in a similar manner that a mixer will down-
convert an IF signal. Similar to the mixer topology, an image
rejection filter is required to limit other potential interfering
signals from also aliasing back into the ADC’s baseband region.
A trade-off exists between the complexity of this image rejection
filter and the ADC’s sample rate as well as dynamic range.
The AD9225 is well suited for various IF sampling applications.
The AD9225’s low distortion input SHA has a full-power band-
width extending beyond 130 MHz thus encompassing many
popular IF frequencies. A DNL of
±
0.4 LSB (typ) combined
with low thermal input referred noise allows the AD9225 in the
2 V span to provide 69 dB of SNR for a baseband input sine
wave. Also, its low aperture jitter of 0.8 ps rms ensures mini-
mum SNR degradation at higher IF frequencies. In fact, the
AD9225 is capable of still maintaining 68 dB of SNR at an IF of
71 MHz with a 2 V input span. Note, although the AD9225 can
yield a 1 dB to 2 dB improvement in SNR when configured for
the larger 4 V span, the 2 V span achieves the optimum full-
scale distortion performance at these higher input frequencies.
Also, the 2 V span reduces the performance requirements of the
input driver circuitry (i.e., IP3) and thus may also be more
attractive from a system implementation perspective.
Figure 35 shows a simplified schematic of the AD9225 config-
ured in an IF sampling application. To reduce the complexity of
the digital demodulator in many quadrature demodulation ap-
plications, the IF frequency and/or sample rate are strategically
selected such that the bandlimited IF signal aliases back into the
center of the ADC’s baseband region (i.e., F
S
/4). This demodu-
lation technique typically reduces the complexity of the post
digital demodulator ASIC which follows the ADC.
OPTIONAL
BANDPASS
FILTER
SAW
FILTER
HIGH
LINEARITY
RF
AMPLIFIER
FROM
PREVIOUS
STAGES
MIXER
200
V
20
V
20
V
0.1
m
F
MINICIRCUITS
T4-6T
RF2317
RF2312
0.1
m
F
10
m
F
VINA
VINB
CML
AD9225
VREF
SENSE
REFCOM
Figure 35. Example of AD9225 IF Sampling Circuit
To maximize its distortion performance, the AD9225 is config-
ured in the differential mode with a 2 V span using a transformer.
The center-tap of the transformer is biased at midsupply via the
CML output of the AD9225. Preceding the AD9225 and trans-
former is an optional bandpass filter as well as a gain stage. A
low Q passive bandpass filter can be inserted to reduce out-
of-band distortion and noise which lies within the AD9225’s
130 MHz bandwidth. A large gain stage(s) is often required to
compensate for the high insertion losses of a SAW filter used for
channel selection and image rejection. The gain stage will also
provide adequate isolation for the SAW filter from the charge
“kick back” currents associated with the AD9225’s switched
capacitor input stage.
The distortion and noise performance of an ADC at the given
IF frequency is of particular concern when evaluating an ADC
for a narrowband IF sampling application. Both single tone and
dual tone SFDR vs. amplitude are very useful in assessing an
ADC’s dynamic and static nonlinearities. SNR vs. amplitude
performance at the given IF is useful in assessing the ADC’s
noise performance and noise contribution due to aperture jitter.
In any application, one is advised to test several units of the
same device under the same conditions to evaluate the given
applications sensitivity to that particular device.
Figures 36–39 combine the dual tone SFDR as well as single
tone SFDR and SNR performances at IF frequencies of 35 MHz,
45 MHz, 70 MHz, and 85 MHz. Note, the SFDR vs. amplitude
data is referenced to dBFS while the single tone SNR data is
referenced to dBc. The performance characteristics in these
figures are representative of the AD9225 without any preceding
gain stage. The AD9225 was operated in the differential mode
(via transformer) with a 2 V span and a sample rate between
28 MSPS and 36 MSPS. The analog supply (AVDD) and the
digital supply (DRVDD) were set to +5 V and 3.3. V respectively.
A
IN
– dBFS
90
95
–15
0
S
–10
–5
85
70
55
50
100
80
75
65
60
SFDR
DUAL-TONE
(dBFS)
SNR
SINGLE-TONE
(dBc)
SFDR
SINGLE-TONE
(dBFS)
Figure 36. IF Undersampling at 35 MHz (F
1
= 34.63 MHz,
F
2
= 35.43 MHz, CLOCK = 20 MHz)
A
IN
– dBFS
90
95
–15
0
S
–10
–5
85
70
55
50
100
80
75
65
60
SFDR
DUAL-TONE
(dBFS)
SNR
SINGLE-TONE
(dBc)
SFDR
SINGLE-TONE
(dBFS)
Figure 37. IF Undersampling at 45 MHz (F
1
= 44.81 MHz,
F
2
= 45.23 MHz, CLOCK = 20 MHz)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9225_03 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 12-Bit, 25 MSPS Monolithic A/D Converter |
| AD9225AR | 功能描述:IC ADC 12BIT 25MSPS 28-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD9225ARRL | 制造商:Analog Devices 功能描述:ADC Single Pipelined 25Msps 12-bit Parallel 28-Pin SOIC W T/R |
| AD9225ARS | 功能描述:IC ADC 12BIT 25MSPS 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD9225ARSRL | 功能描述:IC ADC 12BIT 25MSPS 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
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