參數(shù)資料
型號: AD9236BRUZ-80
廠商: Analog Devices Inc
文件頁數(shù): 23/36頁
文件大?。?/td> 0K
描述: IC ADC 12BIT 80MSPS 28TSSOP
標(biāo)準(zhǔn)包裝: 1
位數(shù): 12
采樣率(每秒): 80M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 366mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 托盤
輸入數(shù)目和類型: 2 個單端,單極;1 個差分,單極
Data Sheet
AD9236
Rev. C | Page 3 of 36
DC SPECIFICATIONS
AVDD = 3 V, DRVDD = 2.5 V, sample rate = 80 MSPS, 2 V p-p differential input, 1.0 V external reference, unless otherwise noted.
Table 1.
Parameter
Temp
Test Level
AD9236BRU/AD9236BCP
Unit
Min
Typ
Max
RESOLUTION
Full
VI
12
Bits
ACCURACY
No Missing Codes
Full
VI
Guaranteed
Offset Error1
Full
VI
±0.30
±1.30
% FSR
Gain Error
25°C
V
±0.10
% FSR
Gain Error1
Full
VI
±0.30
±4.34
% FSR
Differential Nonlinearity (DNL)2
Full
VI
±0.40
±0.65
LSB
Integral Nonlinearity (INL)2
Full
VI
±0.35
±1.20
LSB
TEMPERATURE DRIFT
Offset Error1
Full
V
±6
ppm/°C
Gain Error
Full
V
±12
ppm/°C
Gain Error1
Full
V
±18
ppm/°C
INTERNAL VOLTAGE REFERENCE
Output Voltage Error (1 V)
Full
VI
±2
±35
mV
Load Regulation @ 1.0 mA
25°C
V
0.8
mV
Output Voltage Error (0.5 V)
25°C
V
±1
mV
Load Regulation @ 0.5 mA
25°C
V
0.1
mV
INPUT REFERRED NOISE
VREF = 0.5 V
25°C
V
0.55
LSB rms
VREF = 1.0 V
25°C
V
0.28
LSB rms
ANALOG INPUT
Input Span, VREF = 0.5 V
Full
IV
1
V p-p
Input Span, VREF = 1.0 V
Full
IV
2
V p-p
Input Capacitance3
Full
V
7
pF
REFERENCE INPUT RESISTANCE
Full
V
7
k
POWER SUPPLIES
Supply Voltage
AVDD
Full
IV
2.7
3.0
3.6
V
DRVDD
Full
IV
2.25
2.5
3.6
V
Supply Current
IAVDD4
Full
VI
122
137
mA
IDRVDD4
25°C
V
8
mA
PSRR
25°C
V
±0.01
% FSR
POWER CONSUMPTION
Low Frequency Input4
25°C
V
366
mW
Standby Power5
25°C
V
1.0
mW
1
With a 1.0 V internal reference.
2
Measured at low input frequency, full-scale sine wave, with approximately 5 pF loading on each output bit.
3
Input capacitance refers to the effective capacitance between one differential input pin and AGND. Refer to Figure 5 for the equivalent analog input structure.
4
Measured at AC Specifications conditions without output drivers.
5
Measured with a dc input, CLK pin inactive (that is, set to AVDD or AGND).
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