參數(shù)資料
型號(hào)： AD9240ASRL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 4/24頁(yè)
文件大?。?/td> 0K
描述： IC ADC 14BIT 10MSPS 44-MQFP
標(biāo)準(zhǔn)包裝： 800
位數(shù)： 14
采樣率（每秒）： 10M
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 7
功率耗散（最大）： 330mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 44-QFP
供應(yīng)商設(shè)備封裝： 44-MQFP（10x10）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 2 個(gè)單端，單極；1 個(gè)差分，單極
AD9240
REV.
–12–
REFERENCE OPERATION
The AD9240 contains an onboard bandgap reference that pro-
vides a pin-strappable option to generate either a 1 V or 2.5 V
output. With the addition of two external resistors, the user can
generate reference voltages other than 1 V and 2.5 V. Another
alternative is to use an external reference for designs requiring
enhanced accuracy and/or drift performance. See Table II for a
summary of the pin-strapping options for the AD9240 reference
configurations.
Figure 29 shows a simplified model of the internal voltage
reference of the AD9240. A pin-strappable reference ampli-
fier buffers a 1 V fixed reference. The output from the refer-
ence amplifier, A1, appears on the VREF pin. The voltage on
the VREF pin determines the full-scale input span of the A/D.
This input span equals,
Full-Scale Input Span = 2
× VREF
The voltage appearing at the VREF pin as well as the state of
the internal reference amplifier, A1, are determined by the volt-
age appearing at the SENSE pin. The logic circuitry contains
two comparators which monitor the voltage at the SENSE pin.
The comparator with the lowest set point (approximately 0.3 V)
controls the position of the switch within the feedback path of
A1. If the SENSE pin is tied to REFCOM, the switch is con-
nected to the internal resistor network thus providing a VREF of
2.5 V. If the SENSE pin is tied to the VREF pin via a short or
resistor, the switch is connected to the SENSE pin. A short will
provide a VREF of 1.0 V while an external resistor network will
provide an alternative VREF between 1.0 V and 2.5 V.
The second comparator controls internal circuitry that will
disable the reference amplifier if the SENSE pin is tied AVDD.
Disabling the reference amplifier allows the VREF pin to be
driven by an external voltage reference.
A2
5k
LOGIC
DISABLE
A2
7.5k
LOGIC
A1
5k
DISABLE
A1
1V
TO
A/D
AD9240
CAPT
CAPB
VREF
SENSE
REFCOM
Figure 29. Equivalent Reference Circuit
The actual reference voltages used by the internal circuitry of
the AD9240 appear on the CAPT and CAPB pins. For proper
operation when using the internal or an external reference, it is
necessary to add a capacitor network to decouple these pins.
Figure 30 shows the recommended decoupling network. This
capacitive network performs the following three functions: (1)
along with the reference amplifier, A2, it provides a low source
impedance over a large frequency range to drive the A/D inter-
nal circuitry, (2) it provides the necessary compensation for A2
and (3) it bandlimits the noise contribution from the reference.
The turn-on time of the reference voltage appearing between
CAPT and CAPB is approximately 15 ms and should be evalu-
ated in any power-down mode of operation.
0.1 F
10 F
0.1 F
CAPT
CAPB
AD9240
Figure 30. Recommended CAPT/CAPB Decoupling Network
The A/D’s input span may be varied dynamically by changing
the differential reference voltage appearing across CAPT and
CAPB symmetrically around 2.5 V (i.e., midsupply). To change
the reference at speeds beyond the capabilities of A2, it will be
necessary to drive CAPT and CAPB with two high speed, low
noise amplifiers. In this case, both internal amplifiers (i.e., A1
and A2) must be disabled by connecting SENSE to AVDD and
VREF to REFCOM and the capacitive decoupling network
removed. The external voltages applied to CAPT and CAPB
must be 2.5 V + Input Span/4 and 2.5 V – Input Span/4, respec-
tively, where the input span can be varied between 2 V and 5 V.
Note that those samples within the pipeline A/D during any
reference transition will be corrupted and should be discarded.
B
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