參數(shù)資料
型號: AD9248BCPZRL-40
廠商: Analog Devices Inc
文件頁數(shù): 34/48頁
文件大小: 0K
描述: IC ADC 14BIT DUAL 40MSPS 64LFCSP
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 14
采樣率(每秒): 40M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 330mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 4 個單端,單極;2 個差分,單極
AD9248
Rev. B | Page 4 of 48
Test
AD9248BST/BCP-20
AD9248BST/BCP-40
AD9248BST/BCP-65
Parameter
Temp
Level
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
MATCHING CHARACTERISTICS
Offset Error
(Nonshared Reference Mode)
25°C
I
±0.19
±1.56
±0.19
±1.56
±0.25
±1.74
% FSR
Offset Error
(Shared Reference Mode)
25°C
I
±0.19
±1.56
±0.19
±1.56
±0.25
±1.74
% FSR
Gain Error
(Nonshared Reference Mode)
25°C
I
±0.07
±1.43
±0.07
±1.43
±0.07
±1.47
% FSR
Gain Error
(Shared Reference Mode)
25°C
I
±0.01
±0.06
±0.01
±0.06
±0.01
±0.10
% FSR
1 Gain error and gain temperature coefficient are based on the ADC only (with a fixed 1.0 V external reference).
2 Measured at maximum clock rate with a low frequency sine wave input and approximately 5 pF loading on each output bit.
3 Input capacitance refers to the effective capacitance between one differential input pin and AVSS. Refer to Figure
for the equivalent analog input structure.
4 Measured with dc input at maximum clock rate.
5 Standby power is measured with the CLK_A and CLK_B pins inactive (that is, set to AVDD or AGND).
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