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    參數(shù)資料
    型號: AD9445-BB-LVDS
    廠商: Analog Devices, Inc.
    英文描述: 14-Bit, 105/125 MSPS, IF Sampling ADC
    中文描述: 14位,一百二十五分之一百○五MSPS的,中頻采樣ADC
    文件頁數(shù): 8/40頁
    文件大?。?/td> 965K
    代理商: AD9445-BB-LVDS
    AD9445
    ABSOLUTE MAXIMUM RATINGS
    Table 5.
    Rev. 0 | Page 8 of 40
    Stresses above those listed under Absolute Maximum Ratings
    may cause permanent damage to the device. This is a stress
    rating only; functional operation of the device at these or any
    other conditions above those indicated in the operational
    section of this specification is not implied. Exposure to absolute
    maximum rating conditions for extended periods may affect
    device reliability.
    With
    Respect
    To
    AGND
    AGND
    DGND
    DGND
    DRVDD
    DRVDD
    AVDD1
    DGND
    AGND
    AGND
    Parameter
    ELECTRICAL
    AVDD1
    AVDD2
    DRVDD
    AGND
    AVDD1
    AVDD2
    AVDD2
    D0± to D13±
    CLK+/CLK
    OUTPUT MODE, DCS
    MODE, DFS, SFDR,
    RF ENABLE
    VIN+, VIN
    VREF
    SENSE
    REFT, REFB
    ENVIRONMENTAL
    Storage Temperature
    Range
    Operating Temperature
    Range
    Lead Temperature
    (Soldering 10 sec)
    Junction Temperature
    Rating
    0.3 V to +4 V
    0.3 V to +6 V
    0.3 V to +4 V
    0.3 V to +0.3 V
    4 V to +4 V
    4 V to +6 V
    4 V to +6 V
    –0.3 V to DRVDD + 0.3 V
    –0.3 V to AVDD1 + 0.3 V
    –0.3 V to AVDD1 + 0.3 V
    THERMAL RESISTANCE
    The heat sink of the AD9445 package must be soldered to ground.
    Table 6.
    Package Type
    θ
    JA
    100-lead TQFP/EP
    19.8
    Typical θ
    JA
    = 19.8°C/W (heat sink soldered) for multilayer
    board in still air.
    θ
    JB
    8.3
    θ
    JC
    2
    Unit
    °C/W
    AGND
    AGND
    AGND
    AGND
    –0.3 V to AVDD2 + 0.3 V
    –0.3 V to AVDD1 + 0.3 V
    –0.3 V to AVDD1 + 0.3 V
    –0.3 V to AVDD1 + 0.3 V
    –65°C to +125°C
    Typical θ
    JB
    = 8.3°C/W (heat sink soldered) for multilayer board
    in still air.
    Typical θ
    JC
    = 2°C/W (junction to exposed heat sink) represents
    the thermal resistance through heat sink path.
    Airflow increases heat dissipation, effectively reducing θ
    JA
    . Also,
    more metal directly in contact with the package leads from
    metal traces through holes, ground, and power planes reduces
    the θ
    JA
    . It is required that the exposed heat sink be soldered to
    the ground plane.
    –40°C to +85°C
    300°C
    150°C
    ESD CAUTION
    ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
    the human body and test equipment and can discharge without detection. Although this product features
    proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
    electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
    degradation or loss of functionality.
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