AD9480
Rev. A | Page 4 of 28
DIGITAL SPECIFICATIONS
AVDD = 3.3 V, DRVDD = 3.3 V, TMIN = 40°C, TMAX = +85°C, AIN = 1 dBFS, full scale = 1.0 V, internal reference, differential analog and
clock inputs, unless otherwise noted.
Table 2.
AD9480-250
Parameter
Temp
Test Level
Min
Typ
Max
Unit
CLOCK INPUTS (CLK+, CLK)
Differential Input
Full
IV
200
mV p-p
Full
VI
1.4
1.5
1.68
V
Input Resistance
Full
VI
4.2
5.5
6.0
k
Input Capacitance
25°C
V
4
pF
LOGIC INPUTS (PDWN, S1)
2PDWN Logic 1 Voltage
Full
IV
2.0
V
PDWN Logic 0 Voltage
Full
IV
0.8
V
PDWN Logic 1 Input Current
Full
VI
±160
A
PDWN Logic 0 input Current
Full
VI
10
A
PDWN, S1 Input Resistance
25°C
V
30
k
PDWN, S1 Input Capacitance
25°C
V
4
pF
DIGITAL OUTPUTS
Differential Output Voltage (VOD)3 Full
VI
247
454
mV
Output Offset Voltage (VOS)
Full
VI
1.125
1.375
V
Output Coding
Full
IV
Twos complement or binary
1 The common mode for CLOCK inputs can be externally set, such that 0.9 V < CLK ± < 2.6 V.
2 S1 is a multilevel logic input, see Ta 3 LVDSBIAS resistor = 3.74 k.