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參數(shù)資料
| 型號(hào)： | AD9520-4BCPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 54/80頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK GEN 1.6GHZ VCO 64LFCSP |
| 設(shè)計(jì)資源： | Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121) Phase Coherent FSK Modulator (CN0186) |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 類型： | 時(shí)鐘發(fā)生器，扇出配送 |
| PLL： | 是 |
| 輸入： | CMOS，LVDS，LVPECL |
| 輸出： | CMOS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:12，2:24 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 1.8GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 帶卷 (TR) |
| 配用： | AD9520-4/PCBZ-ND - BOARD EVAL FOR AD9520-4 |
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AD9520-4
Data Sheet
Rev. A | Page 58 of 80
EEPROM OPERATIONS
The AD9520 contains an internal EEPROM (nonvolatile memory).
The EEPROM can be programmed by users to create and store
a user-defined register setting file when the power is off. This
setting file can be used for power-up and chip reset as a default
setting. The EEPROM size is 512 bytes.
Note that, to guarantee proper loading of the EEPROM during
startup, a high-low-high pulse on the RESET pin should occur after
the power supply has stabilized.
During the data transfer process, the write and read registers via
the serial port are generally not available except for one readback
register, STATUS_EEPROM.
To determine the data transfer state through the serial port
in SPI mode, users can read the value of STATUS_EEPROM
(1b = in process; 0b = completed).
In IC mode, the user can address the AD9520 slave port with the
external IC master (send an address byte to the AD9520). If the
AD9520 responds with a no acknowledge bit, the data transfer
process does not take place. If the AD9520 responds with an
acknowledge bit, the data transfer process is completed. The
user can monitor the STATUS_EEPROM register or program
the STATUS pin to monitor the status of the data transfer.
WRITING TO THE EEPROM
The EEPROM cannot be programmed directly through the serial
port interface. To program the EEPROM and store a register
setting file, do the following:
1. Program the AD9520 registers to the desired circuit state.
If the user wants the PLL to lock automatically after power-up,
the VCO calibration now bit (Register 0x018[0]) must be
set to 1b. This allows VCO calibration to start
automatically after register loading. Note that a valid input
reference signal must be present during VCO calibration.
2. Program the EEPROM buffer registers, if necessary (see
the Programming the EEPROM Buffer Segment section).
This step is necessary only if the user wants to use the
EEPROM to control the default setting of some (but not
all) of the AD9520 registers, or to control the register
setting update sequence during power-up or chip reset.
3. Set the enable EEPROM write bit (Register 0xB02[0]) to 1b
to enable the EEPROM.
4. Set the REG2EEPROM bit (Register 0xB03[0]) to 1b.
5. Set the IO_UPDATE bit (Register 0x232[0]) to 1b, which
starts the process of writing data into the EEPROM to
create the EEPROM setting file. This enables the AD9520
EEPROM controller to transfer the current register values,
as well as the memory address and instruction bytes from the
EEPROM buffer segment into the EEPROM. After the
write process is completed, the internal controller sets
Register 0xB03[0] (REG2EEPROM) back to 0b.
The STATUS_EEPROM bit in the readback register
(Register 0xB00[0]) is used to indicate the data transfer
status between the EEPROM and the control registers
(0b = complete/inactive; 1b = in process/active). At the start
of the data transfer, STATUS_EEPROM is set to 1b by the
EEPROM controller and cleared to 0b at the end of the data
transfer. The STATUS_EEPROM bit can be accessed through
the STATUS pin when the STATUS pin is programmed to
monitor the STATUS_EEPROM bit. Alternatively, the user
can monitor the STATUS_EEPROM bit directly by reading
the register.
6. When the data transfer process is done (Register 0xB00[0] =
0b), set the enable EEPROM write bit (Register 0xB02[0]) to
0b to disable writing to the EEPROM.
To verify that the data transfer has completed correctly, ensure
that Register 0xB01[0] = 0b. A value of 1b in this register indicates
a data transfer error. When an EEPROM save/load transfer is
complete, wait a minimum of 10 s before starting the next
EEPROM save/load transfer.
READING FROM THE EEPROM
The following reset-related events can start the process of
restoring the settings stored in EEPROM to control registers.
When the EEPROM pin is set high, do any of the following:
Power up the AD9520.
Perform a hardware chip reset by pulling the RESET pin
low and then releasing RESET.
Set the self-clearing soft reset bit (Register 0x000[5]) to 1b.
When the EEPROM pin is set low, set the self-clearing
SOFT_EEPROM bit (Register 0xB02[1]) to 1b. The AD9520
then starts to read the EEPROM and loads the values into the
active registers.
If the EEPROM pin is low during reset or power-up, the
EEPROM is not active, and the AD9520 default values are
loaded instead.
Note that, when using the EEPROM to automatically load the
AD9520 register values and lock the PLL, the VCO calibration
now bit (Register 0x018[0]) must be set to 1b when the register
values are written to the EEPROM. This allows VCO calibration
to start automatically after register loading. A valid input
reference signal must be present during VCO calibration.
To verify that the data transfer has completed correctly, verify
that Register 0xB01[0] = 0b. A value of 1b in this register indicates
a data transfer error. When an EEPROM save/load transfer is
complete, wait a minimum of 10 s before starting the next
EEPROM save/load transfer.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9520-5 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12 LVPECL/24 CMOS Output Clock Generator |
| AD9520-5/PCBZ | 功能描述:BOARD EVAL FOR AD9520-5 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081 |
| AD9520-5BCPZ | 功能描述:IC CLOCK GEN EXT VCO 64-LFCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類型:時(shí)鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| AD9520-5BCPZ-REEL7 | 功能描述:IC CLOCK GEN EXT VCO 64LFCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 時(shí)鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| AD9521JH | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Log/Antilog Amplifier |
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