Typical (typ) is given for VS = 3.3 V ± 10%," />
參數(shù)資料
型號: AD9572ACPZLVD-RL
廠商: Analog Devices Inc
文件頁數(shù): 17/20頁
文件大?。?/td> 0K
描述: IC PLL CLOCK GEN 25MHZ 40LFCSP
標(biāo)準(zhǔn)包裝: 2,500
類型: 時(shí)鐘發(fā)生器,扇出配送,多路復(fù)用器
PLL:
輸入: 晶體
輸出: CMOS,LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:7
差分 - 輸入:輸出: 無/是
頻率 - 最大: 156.25MHz
除法器/乘法器: 是/無
電源電壓: 2.97 V ~ 3.63 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 40-LFCSP-WQ(6x6)
包裝: 帶卷 (TR)
AD9572
Rev. B | Page 6 of 20
CLOCK OUTPUTS
Typical (typ) is given for VS = 3.3 V ± 10%, TA = 25°C, unless otherwise noted. Minimum (min) and maximum (max) values are given
over full VS and TA (40°C to +85°C) variation.
Table 6.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
LVPECL CLOCK OUTPUTS
Output Frequency
156.25
MHz
Output High Voltage (VOH)
VS 1.24
VS 1.05
VS 0.83
V
Output Low Voltage (VOL)
VS 2.07
VS 1.87
VS 1.62
V
Output Differential Voltage (VOD)
700
825
950
mV
Duty Cycle
45
55
%
LVDS CLOCK OUTPUTS
Output Frequency
156.25
MHz
Differential Output Voltage (VOD)
250
350
475
mV
Delta VOD
25
mV
Output Offset Voltage (VOS)
1.125
1.25
1.375
V
Delta VOS
25
mV
Short-Circuit Current (ISA, ISB)
14
24
mA
Output shorted to GND
Duty Cycle
45
55
%
CMOS CLOCK OUTPUTS
Output Frequency
33.33
MHz
Output High Voltage (VOH)
VS 0.1
V
Sourcing 1.0 mA current
Output Low Voltage (VOL)
0.1
V
Sinking 1.0 mA current
Duty Cycle
42
58
%
TIMING CHARACTERISTICS
Typical (typ) is given for VS = 3.3 V ± 10%, TA = 25°C, unless otherwise noted. Minimum (min) and maximum (max) values are given
over full VS and TA (40°C to +85°C) variation.
Table 7.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
LVPECL
Termination = 200 Ω to 0 V; CLOAD = 0 pF; CAC = 100
nF; oscilloscope set to 50 Ω termination
Output Rise Time, tRP
480
625
810
ps
20% to 80%, measured differentially
Output Fall Time, tFP
480
625
810
ps
80% to 20%, measured differentially
LVDS
Termination = 100 Ω differential; CLOAD = 0 pF; CAC =
100 nF; oscilloscope set to 50 Ω termination
Output Rise Time, tRL
160
350
540
ps
20% to 80%, measured differentially
Output Fall Time, tFL
160
350
540
ps
80% to 20%, measured differentially
CMOS
Output Rise Time, tRC
0.25
0.50
2.5
ns
20% to 80%; termination = 50 Ω to 0 V; CLOAD = 5 pF;
CAC = 100 nF
Output Fall Time, tFC
0.25
0.70
2.5
ns
80% to 20%; termination = 50 Ω to 0 V; CLOAD = 5 pF;
CAC = 100 nF
Output Rise Time, tRC2
1.3
2.1
2.6
ns
20% to 80%; active probe measurement, Cprobe =
1 pF, Rprobe=20 k
Ω, C
LOAD
= 3.9 pF
Output Fall Time, tFC2
1.4
2.3
3.0
ns
80% to 20%; active probe measurement, Cprobe =
1 pF, Rprobe=20 k
Ω, C
LOAD
= 3.9 pF
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