參數(shù)資料
型號: AD96685BRZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 1/8頁
文件大小: 0K
描述: IC COMP SNGL ULTRA-FAST 16-SOIC
標(biāo)準(zhǔn)包裝: 2,500
類型: 帶鎖銷
元件數(shù): 1
輸出類型: 補充型,ECL,開路發(fā)射極
電壓 - 輸入偏移(最小值): 2mV @ -5.2V,5V
電流 - 輸入偏壓(最小值): 10µA @ -5.2V,5V
電流 - 輸出(標(biāo)準(zhǔn)): 30mA
電流 - 靜態(tài)(最大值): 18mA,36mA
CMRR, PSRR(標(biāo)準(zhǔn)): 90dB CMRR,70dB PSRR
傳輸延遲(最大): 3.5ns
工作溫度: -25°C ~ 85°C
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
安裝類型: 表面貼裝
包裝: 帶卷 (TR)
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
AD96685/AD96687
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2001
Ultrafast Comparators
AD96685 FUNCTIONAL BLOCK DIAGRAM
NONINVERTING
INPUT
INVERTING
INPUT
Q OUTPUT
RL
VT
LATCH
ENABLE
AD96687 FUNCTIONAL BLOCK DIAGRAM
NONINVERTING
INPUT
INVERTING
INPUT
RL
VT
Q OUTPUT
LE
LATCH
ENABLE
NONINVERTING
INPUT
INVERTING
INPUT
RL
Q OUTPUT
LE
LATCH
ENABLE
THE OUTPUTS ARE OPEN EMITTERS, REQUIRING EXTERNAL
PULL-DOWN RESISTORS.THESE RESISTORS MAY BE IN THE
RANGE OF 50 -200
CONNECTED TO –2.0V, OR 200 -2000
FEATURES
Fast: 2.5 ns Propagation Delay
Low Power: 118 mW per Comparator
Packages: DIP, SOIC, PLCC
Power Supplies: +5 V, –5.2 V
Logic Compatibility: ECL
50 ps Delay Dispersion
APPLICATIONS
High Speed Triggers
High Speed Line Receivers
Threshold Detectors
Window Comparators
Peak Detectors
GENERAL DESCRIPTION
The AD96685 and AD96687 are ultrafast voltage comparators.
The AD96685 is a single comparator with 2.5 ns propagation
delay; the AD96687 is an equally fast dual comparator. Both
devices feature 50 ps propagation delay dispersion which is a
particularly important characteristic of high-speed comparators.
It is a measure of the difference in propagation delay under
differing overdrive conditions.
A fast, high precision differential input stage permits consistent
propagation delay with a wide variety of signals in the common-
mode range from –2.5 V to +5 V. Outputs are complementary
digital signals fully compatible with ECL 10 K and 10 KH logic
families. The outputs provide sufficient drive current to directly
drive transmission lines terminated in 50
to –2 V. A level
sensitive latch input which permits tracking, track-hold, or
sample-hold modes of operation is included.
The AD96685 is available in industrial –25
°C to +85°C range
in 16-pin SOIC.
The AD96687 is available in industrial range –25
°C to +85°C,
in 16-pin DIP, SOIC, and 20-lead PLCC.
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