參數(shù)資料
型號(hào)： AD9706-EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 33/44頁(yè)
文件大小： 0K
描述： BOARD EVAL FOR AD9706
產(chǎn)品培訓(xùn)模塊： DAC Architectures
標(biāo)準(zhǔn)包裝： 1
系列： TxDAC®
DAC 的數(shù)量： 1
位數(shù)： 12
采樣率（每秒）： 175M
數(shù)據(jù)接口： 串行
設(shè)置時(shí)間： 11ns
DAC 型： 電流
工作溫度： -40°C ~ 85°C
已供物品： 板
已用 IC / 零件： AD9706
相關(guān)產(chǎn)品： AD9706BCPZRL7-ND - IC DAC TX 12BIT 175MSPS 32-LFCSP
AD9706BCPZ-ND - IC DAC TX 12BIT 175MSPS 32-LFCSP
Data Sheet
AD9704/AD9705/AD9706/AD9707
Rev. B | Page 39 of 44
The AD9704/AD9705/AD9706/AD9707 devices allow reading
and writing of the calibration coefficients. There are 33 coefficients
in total. The read/write feature of the coefficients can be useful
for improving the results of the self-calibration routine by averaging
the results of several calibration results and loading the averaged
results back into the device. The reading and writing routines
follow.
To read the calibration coefficients to the device:
1.
Enable the calibration clock by setting the CALCLK bit
(Register 0x02, Bit 0).
2.
Write the address of the first coefficient (0x00) to
Register 0x10.
3.
Set the SMEMRD bit (Register 0x0F, Bit 2) by writing 0x04
to Register 0x0F.
4.
Wait at least 160 CLK+/CLK clock cycles.
5.
Read the value of the first coefficient by reading the
contents of Register 0x11.
6.
Clear the SMEMRD bit by writing 0x00 to Register 0x0F.
7.
Repeat Step 2 through Step 6 for each of the remaining 32
coefficients by incrementing the address by one for each
read.
8.
Disable the calibration clock by clearing the CALCLK Bit
(Register 0x02, Bit 0).
To write the calibration coefficients to the device:
1.
Enable the calibration clock by setting the CALCLK bit
(Register 0x02, Bit 0).
2.
Set the SMEMWR bit (Register 0x0F, Bit 3) by writing 0x08
to Register 0x0F.
3.
Write the address of the first coefficient (0x00) to
Register 0x10.
4.
Write the value of the first coefficient to Register 0x11.
5.
Wait at least 160 CLK+/CLK clock cycles
6.
Repeat Step 3 through Step 5 for each of the remaining 32
coefficients by incrementing the address by one for each write.
7.
Clear the SMEMWR bit by writing 0x00 to Register 0x0F.
8.
Disable the calibration clock by clearing the CALCLK bit
(Register 0x02, Bit 0).
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