- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8657 > AD9714BCPZRL7 (Analog Devices Inc)IC DAC DUAL 8BIT LO PWR 40LFCSP PDF資料下載
參數(shù)資料
| 型號(hào)： | AD9714BCPZRL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 44/80頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC DUAL 8BIT LO PWR 40LFCSP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 系列： | TxDAC® |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 86mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 40-LFCSP-VQ（6x6） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電流，單極 |
| 采樣率（每秒）： | 125M |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁當(dāng)前第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁
AD9714/AD9715/AD9716/AD9717
Rev. A | Page 49 of 80
DIFFERENTIAL BUFFERED OUTPUT
USING AN OP AMP
A dual op amp (see the circuit shown in Figure 105) can be used
in a differential version of the single-ended buffer shown in
Figure 104. The same RC network is used to form a one-pole
differential, low-pass filter to isolate the op amp inputs from
the high frequency images produced by the DAC outputs. The
feedback resistors, RFB, determine the differential peak-to-peak
signal swing by the formula
VOUT = 2 × RFB × IFS
The maximum and minimum single-ended voltages out of the
amplifier are, respectively,
B
FB
REF
MAX
R
V
1
VMIN = VMAX RFB × IFS
The common-mode voltage of the differential output is
determined by the formula
VCM = VMAX RFB × IFS
07
26
5-
06
1
AD9714/AD9715/
AD9716/AD9717
IOUTP
IOUTN
RFB
VOUT
REFIO 34
28
RS
AVSS 25
CF
C
RFB
RB
CF
RS
RB
29
+
–
ADA4841-2
+
–
ADA4841-2
Figure 105. Single-Supply Differential Buffer
AUXILIARY DACs
The DACs of the AD9714/AD9715/AD9716/AD9717 feature
two versatile and independent 10-bit auxiliary DACs suitable
for dc offset correction and similar tasks.
Because the AUXDACs are driven through the SPI port, they
should never be used in timing-critical applications, such
as inside analog feedback loops.
To keep the pin count reasonable, these auxiliary DACs each
share a pin with the corresponding FSADJx resistor. They are,
therefore, usable only when enabled and when that DAC is
operated on its internal full-scale resistors. A simple I-to-V
converter is implemented on chip with selectable shunt resistors
(3.2 kΩ to 16 kΩ) such that if REFIO is set to exactly 1 V, REFIO/2
equals 0.5 V and the following equation describes the no load
output voltage:
k
16
5
.
1
V
5
.
0
S
DAC
OUT
R
I
V
Figure 106 illustrates the function of all the SPI bits controlling
these DACs with the exception of the QAUXEN (Register 0x0A,
Bit 7) and IAUXEN (Register 0x0C, Bit 7) bits and gating to
prohibit RS < 3.2 kΩ.
07
26
5-
0
43
+
–
OP AMP
AUXDAC
[9:0]
AVDD
RNG0
RNG1
REFIO
2
16k 16k
16k
4k
8k
OFS2
OFS1
OFS0
(OFS > 4 = 4)
AUX
PIN
RNG: 00 = > 125A
fS
01 = > 62A
fS
10 = > 31A
fS
11 = > 16A
fS
Figure 106. AUXDAC Simplified Circuit Diagram
The SPI speed limits the update rate of the auxiliary DACs. The
data is inverted such that IAUXDAC is full scale at 0x000 and zero
at 0x1FF, as shown in Figure 107.
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
10
20
30
40
50
60 70
80
90 100
120 130
IAUXDAC (A)
OU
TP
U
T
(
V
)
07
26
5-
0
45
110
ROFFSET = 3.3k
ROFFSET = 4k
ROFFSET = 5.3k
ROFFSET = 8k
ROFFSET = 16k
OP AMP OUTPUT VOLTAGE vs. CHANGES
IN ROFFSET AND DAC CURRENT IN A
Figure 107. AUXDAC Op Amp Output vs. Current, AVDD = 3.3 V, No Load,
AUXDAC 0x1FF to 0x000
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9114BCPZRL7 | IC DAC DUAL 8BIT LO PWR 40LFCSP |
| IDT49FCT3805QI | IC CLK BUFFER 1:5 100MHZ 20-QSOP |
| V110A15H400BG2 | CONVERTER MOD DC/DC 15V 400W |
| VI-J6Y-MY | CONVERTER MOD DC/DC 3.3V 33W |
| VI-J0H-MX-B1 | CONVERTER MOD DC/DC 52V 75W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9714-DPG2-EBZ | 功能描述:ADC 8BIT DUAL 40LFCSP RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9714-EBZ | 制造商:Analog Devices 功能描述:DUAL 8 BIT LOW POWER CONVERTER - Boxed Product (Development Kits) |
| AD9715 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual, 8-/10-/12-/14-Bit Low Power Digital-to-Analog Converters |
| AD9715BCPZ | 功能描述:IC DAC DUAL 10BIT LO PWR 40LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD9715BCPZRL7 | 功能描述:IC DAC DUAL 10BIT LO PWR 40LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。