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參數(shù)資料
| 型號： | AD9717BCPZRL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 38/80頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC DUAL 14BIT LO PWR 40LFCSP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 系列： | TxDAC® |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 86mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 40-LFCSP-VQ（6x6） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電流，單極 |
| 采樣率（每秒）： | 125M |
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AD9714/AD9715/AD9716/AD9717
Rev. A | Page 43 of 80
REFERENCE OPERATION
The AD9714/AD9715/AD9716/AD9717 contain an internal
1.0 V band gap reference. The internal reference can be disabled
by setting Bit 0 (EXTREF) of the power-down register (Address
0x01) through the SPI interface. To use the internal reference,
decouple the REFIO pin to AVSS with a 0.1 μF capacitor, enable
the internal reference, and clear Bit 0 of the power-down register
(Address 0x01) through the SPI interface. Note that this is the
default configuration. The internal reference voltage is present
at REFIO. If the voltage at REFIO is to be used anywhere else in
the circuit, an external buffer amplifier with an input bias current
of less than 100 nA must be used to avoid loading the reference.
An example of the use of the internal reference is shown in
CURRENT
SCALING
×32
AD9714/AD9715/
AD9716/AD9717
I DAC
OR
Q DAC
07
26
5
-21
8
IxOUTFS
xRSET
0.1F
REFIO
IxREF
AVSS
FSADJx
VBG
1.0V
+
–
Figure 96. Internal Reference Configuration
REFIO serves as either an input or an output, depending on
whether the internal or an external reference is used. Table 17
summarizes the reference operation.
Table 17. Reference Operation
Reference Mode
REFIO Pin
Register Setting
Internal
Connect 0.1 μF
capacitor
Register 0x01, Bit 0 = 0
(default)
External
Apply external
capacitor
Register 0x01, Bit 0 = 1
(for power saving)
An external reference can be used in applications requiring
tighter gain tolerances or lower temperature drift. Also, a
variable external voltage reference can be used to implement a
method for gain control of the DAC output.
Recommendations When Using an External Reference
Apply the external reference to the REFIO pin. The internal
reference can be directly overdriven by the external reference,
or the internal reference can be powered down to save power
consumption
The external 0.1 μF compensation capacitor on REFIO is not
required unless specified by the external voltage reference
manufacturer. The input impedance of REFIO is 10 kΩ when
the internal reference is powered up and 1 MΩ when it is
powered down.
REFERENCE CONTROL AMPLIFIER
The AD9714/AD9715/AD9716/AD9717 contain a control
amplifier that regulates the full-scale output current, IxOUTFS.
The control amplifier is configured as a V-I converter, as shown
ratio of the VREFIO and an external resistor, xRSET, as stated in
mirrored to the segmented current sources with the proper scale
factor to set IxOUTFS, as stated in Equation 3.
The control amplifier allows a 2.5:1 adjustment span of IxOUTFS
from 1 mA to 4 mA by setting IxREF between 125 μA and 31.25 μA
(set xRSET between 8 kΩ and 32 kΩ). The wide adjustment span
of IxOUTFS provides several benefits. The first relates directly to
the power dissipation of the AD9714/AD9715/AD9716/AD9717,
section). The second benefit relates to the ability to adjust the
output over a 8 dB range with 0.25 dB steps, which is useful for
controlling the transmitted power. The small signal bandwidth
of the reference control amplifier is approximately 500 kHz.
This allows the device to be used for low frequency, small signal
multiplying applications.
When an external resistor greater than 16 kΩ is used on the
FSADJx pins, care must be taken to maintain the high frequency
equivalent circuit to an impedance lower than 16 kΩ by
splitting the resistor into two resistors in series with a 10 nF
capacitor in parallel with the resistor to AVSS (see Figure 97).
AD9714/AD9715/
AD9716/AD9717
07
26
5-
21
9
xRSET
0.1F
R < 16k
REFIO
AVSS
FSADJx
10nF
Figure 97. xRSET Configuration for Values > 16 kΩ
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參數(shù)描述 |
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| AD9717-DPG2-EBZ | 功能描述:ADC 14BIT DUAL 40LFCSP RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9717-EBZ | 制造商:Analog Devices 功能描述:DUAL 14B, LOW POWER D-A CONVERTER - Boxed Product (Development Kits) |
| AD9720BN | 制造商:Rochester Electronics LLC 功能描述:10BIT 400MSPS DAC IC IC - Bulk |
| AD9720BR | 制造商:Analog Devices 功能描述:PARALLEL, WORD INPUT LOADING, 0.0045 us SETTLING TIME, 10-BIT DAC, PDSO28 |
| AD9720TE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10-Bit Digital-to-Analog Converter |
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