參數(shù)資料
型號(hào)： AD9744ARUZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 11/32頁(yè)
文件大?。?/td> 0K
描述： IC DAC 14BIT 210MSPS 28-TSSOP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 50
系列： TxDAC®
設(shè)置時(shí)間： 11ns
位數(shù)： 14
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 145mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 28-TSSOP
包裝： 管件
輸出數(shù)目和類型： 2 電流，單極；2 電流，雙極
采樣率（每秒）： 210M
產(chǎn)品目錄頁(yè)面： 785 (CN2011-ZH PDF)
配用： AD9744ACP-PCBZ-ND - BOARD EVAL FOR AD9744ACP
Data Sheet
AD9744
Rev. C | Page 19 of 32
these switches, the PSRR is very code dependent. This can produce
a mixing effect that can modulate low frequency power supply
noise to higher frequencies. Worst-case PSRR for either one of
the differential DAC outputs will occur when the full-scale current
is directed toward that output. As a result, the PSRR measurement
in Figure 39 represents a worst-case condition in which the
digital inputs remain static and the full-scale output current of
20 mA is directed to the DAC output being measured.
An example serves to illustrate the effect of supply noise on the
analog supply. Suppose a switching regulator with a switching
frequency of 250 kHz produces 10 mV of noise and, for
simplicity’s sake (ignoring harmonics), all of this noise is
concentrated at 250 kHz. To calculate how much of this
undesired noise will appear as current noise superimposed on
the DAC’s full-scale current, IOUTFS, one must determine the
PSRR in dB using Figure 39 at 250 kHz. To calculate the PSRR
for a given RLOAD, such that the units of PSRR are converted
from A/V to V/V, adjust the curve in Figure 39 by the scaling
factor 20 log (RLOAD). For instance, if RLOAD is 50 , the PSRR
is reduced by 34 dB (that is, PSRR of the DAC at 250 kHz,
which is 85 dB in Figure 39, becomes 51 dB VOUT/VIN).
Proper grounding and decoupling should be a primary
objective in any high speed, high resolution system. The
AD9744 features separate analog and digital supplies and
ground pins to optimize the management of analog and digital
ground currents in a system. In general, AVDD, the analog
supply, should be decoupled to ACOM, the analog common, as
close to the chip as physically possible. Similarly, DVDD, the
digital supply, should be decoupled to DCOM as close to the
chip as physically possible.
For those applications that require a single 3.3 V supply for both
the analog and digital supplies, a clean analog supply may be
generated using the circuit shown in Figure 40. The circuit
consists of a differential LC filter with separate power supply
and return lines. Lower noise can be attained by using low ESR
type electrolytic and tantalum capacitors.
Figure 40. Differential LC Filter for Single 3.3 V Applications
100
F
ELECT.
0.1
F
CER.
TTL/CMOS
LOGIC
CIRCUITS
3.3V
POWER SUPPLY
FERRITE
BEADS
AVDD
ACOM
10
F–22F
TANT.
02913-037
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參數(shù)描述
AD9744ARUZ 制造商:Analog Devices 功能描述:D/A CONVERTER (D-A) IC 制造商:Analog Devices 功能描述:IC, DAC, 14BIT, 210MSPS, TSSOP-28
AD9744ARUZ1 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 210 MSPS TxDAC㈢ D/A Converter
AD9744ARUZRL7 功能描述:IC DAC 14BIT 210MSPS 28-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:*
AD9744ARUZRL71 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 210 MSPS TxDAC㈢ D/A Converter
AD9744ARZ 功能描述:IC DAC 14BIT 210MSPS 28-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁(yè)面:1398 (CN2011-ZH PDF)
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