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參數(shù)資料
| 型號： | AD9763ASTZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 27/44頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 10BIT DUAL 125MSPS 48LQFP |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 2,000 |
| 系列： | TxDAC+® |
| 設置時間： | 35ns |
| 位數(shù)： | 10 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 450mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應商設備封裝： | 48-LQFP（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電流，單極；4 電流，雙極 |
| 采樣率（每秒）： | 125M |
| 配用： | AD9763-EBZ-ND - BOARD EVAL FOR AD9763 |
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Data Sheet
AD9763/AD9765/AD9767
Rev. G | Page 33 of 44
I and Q digital data can be fed into the AD9763 in two ways. In
dual-port mode, the digital I information drives one input port,
and the digital Q information drives the other input port. If no
interpolation filter precedes the DAC, the symbol rate is the rate
at which the system clock drives the CLK and WRT pins on the
AD9763. In interleaved mode, the digital input stream at Port 1
contains the I and the Q information in alternating digital words.
Using IQSEL and IQRESET, the AD9763 can be synchronized to
the I and Q data streams. The internal timing of the AD9763 routes
the selected I and Q data to the correct DAC output. In interleaved
mode, if no interpolation filter precedes the AD9763, the symbol
rate is half that of the system clock driving the digital data stream
and the IQWRT and IQCLK pins on the AD9763.
CDMA
Code division multiple access (CDMA) is an air transmit/receive
scheme in which the signal in the transmit path is modulated
with a pseudorandom digital code (sometimes referred to as the
spreading code). The effect of this is to spread the transmitted
signal across a wide spectrum. Similar to a discrete multitone
(DMT) waveform, a CDMA waveform containing multiple
subscribers can be characterized as having a high peak to average
ratio (that is, crest factor), thus demanding highly linear
components in the transmit signal path. The bandwidth of the
spectrum is defined by the CDMA standard being used, and in
operation it is implemented by using a spreading code with
particular characteristics.
Distortion in the transmit path can lead to power being transmitted
out of the defined band. The ratio of power transmitted in-band to
out-of-band is often referred to as adjacent channel power (ACP).
This is a regulatory issue due to the possibility of interference with
other signals being transmitted by air. Regulatory bodies define a
spectral mask outside of the transmit band, and the ACP must fall
under this mask. If distortion in the transmit path causes the
ACP to be above the spectral mask, filtering or different
component selection is needed to meet the mask requirements.
Figure 85 shows the results of using the AD9763/AD9765/
AD9767 with the AD8346 to reconstruct a wideband CDMA
signal centered at 2.4 GHz. The baseband signal is sampled at
65 MSPS and has a chip rate of 8 MHz.
cu1
==
–80
–120
–70
–90
–110
–50
–60
–100
–40
CENTER 2.4GHz
–130
–30
(d
B
)
C0
c11
FREQUENCY
cu1
C0
c11
SPAN 30MHz
3MHz
00
61
7-
08
5
Figure 85. CDMA Signal, 8 MHz Chip Rate Sampled at 65 MSPS, Recreated at
2.4 GHz, Adjacent Channel Power >60 dBm
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9763-EB | 制造商:Analog Devices 功能描述: |
| AD9763-EBZ | 功能描述:BOARD EVAL FOR AD9763 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:TxDAC+® 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9764 | 制造商:Analog Devices 功能描述: |
| AD9764AR | 功能描述:IC DAC 14BIT 125MSPS 28-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 產(chǎn)品培訓模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應商設備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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