參數(shù)資料
型號(hào): AD9764ARUZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 9/22頁(yè)
文件大小: 0K
描述: IC DAC 14BIT 125MSPS 28-TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 50
系列: TxDAC®
設(shè)置時(shí)間: 35ns
位數(shù): 14
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
功率耗散(最大): 170mW
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 管件
輸出數(shù)目和類(lèi)型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 125M
產(chǎn)品目錄頁(yè)面: 785 (CN2011-ZH PDF)
REV. B
AD9764
–17–
of the DAC can be evaluated. Nonlinearities associated with the
DAC will create spurious tones of which some may fall back into
the “empty” channel thus limiting a channel’s carrier-to-noise
ratio. Other spurious components falling outside the band of
interest may also be important, depending on the system’s spectral
mask and filtering requirements.
This particular test vector was centered around one-half the
Nyquist bandwidth (i.e., fCLOCK/4) with a passband of fCLOCK/16.
Centering the tones at a much lower region (i.e., fCLOCK/10)
would lead to an improvement in performance while centering
the tones at a higher region (i.e., fCLOCK/2.5) would result in a
degradation in performance. Figure 40a shows the SFDR vs.
amplitude at different sample rates up to the Nyquist frequency
while Figure 40b shows the SFDR vs. amplitude within the
passband of the test vector. In assessing a DAC’s multitone
performance, it is also recommended that several units be tested
under exactly the same conditions to determine any performance
variability.
AOUT – dBFS
SFDR
dBc
80
50
–20
–15
0
–10
–5
70
60
10 MSPS
100 MSPS
20 MSPS
50 MSPS
40
30
75
65
55
45
35
Figure 40a. Multitone SFDR vs. AOUT (Up to Nyquist)
SFDR
dBc
50
70
60
40
75
65
55
45
80
10 MSPS
20 MSPS
50 MSPS
100 MSPS
AOUT – dBFS
–20
–15
0
–10
–5
Figure 40b. Multitone SFDR vs. AOUT (Within Multitone
Passband)
AD9764 EVALUATION BOARD
General Description
The AD9764-EB is an evaluation board for the AD9764 14-bit
DAC converter. Careful attention to layout and circuit design,
combined with a prototyping area, allows the user to easily and
effectively evaluate the AD9764 in any application where high
resolution, high speed conversion is required.
This board allows the user the flexibility to operate the AD9764
in various configurations. Possible output configurations include
transformer coupled, resistor terminated, inverting/noninverting
and differential amplifier outputs. The digital inputs are designed
to be driven directly from various word generators with the
onboard option to add a resistor network for proper load termi-
nation. Provisions are also made to operate the AD9764 with
either the internal or external reference or to exercise the power-
down feature.
Refer to the application note AN-420, Using the AD9760/AD9764/
AD9764-EB Evaluation Board for a thorough description and
operating instructions for the AD9764 evaluation board.
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