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參數(shù)資料
| 型號： | AD9767-EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/44頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD9767 |
| 產品培訓模塊： | DAC Architectures |
| 標準包裝： | 1 |
| 系列： | TxDAC+® |
| DAC 的數(shù)量： | 2 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 125M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 設置時間： | 35ns |
| DAC 型： | 電流 |
| 工作溫度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD9767 |
| 相關產品： | AD9767ASTZRL-ND - IC DAC 14BIT DUAL 125MSPS 48LQFP AD9767ASTZ-ND - IC DAC 14BIT DUAL 125MSPS 48LQFP |
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AD9763/AD9765/AD9767
Data Sheet
Rev. G | Page 20 of 44
TERMINOLOGY
Linearity Error (Integral Nonlinearity or INL)
Linearity error is defined as the maximum deviation of the
actual analog output from the ideal output, determined by a
straight line drawn from zero to full scale.
Differential Nonlinearity (DNL)
DNL is the measure of the variation in analog value, normalized to
full scale, associated with a 1 LSB change in digital input code.
Monotonicity
A DAC is monotonic if the output either increases or remains
constant as the digital input increases.
Offset Error
Offset error is the deviation of the output current from the ideal of
zero. For IOUTA, 0 mA output is expected when the inputs are all 0s.
For IOUTB, 0 mA output is expected when all inputs are set to 1s.
Gain Error
Gain error is the difference between the actual and ideal output
spans. The actual span is determined by the output when all inputs
are set to 1s minus the output when all inputs are set to 0s.
Output Compliance Range
The output compliance range is the range of allowable voltage at
the output of a current-output DAC. Operation beyond the
maximum compliance limits may cause either output stage
saturation or breakdown resulting in nonlinear performance.
Temperature Drift
Temperature drift is specified as the maximum change from the
ambient (25°C) value to the value at either TMIN or TMAX. For
offset and gain drift, the drift is reported in part per million (ppm)
of full-scale range (FSR) per degree Celsius. For reference drift,
the drift is reported in ppm per degree Celsius (ppm/°C).
Power Supply Rejection (PSR)
PSR is the maximum change in the full-scale output as the
supplies are varied from nominal to minimum and maximum
specified voltages.
Settling Time
Settling time is the time required for the output to reach and
remain within a specified error band about its final value,
measured from the start of the output transition.
Glitch Impulse
Asymmetrical switching times in a DAC give rise to undesired
output transients that are quantified by a glitch impulse. It is
specified as the net area of the glitch in picovolts per second (pV-s).
Spurious-Free Dynamic Range (SFDR)
The difference, in decibels (dB), between the rms amplitude of
the output signal and the peak spurious signal over the specified
bandwidth.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the first six harmonic
components to the rms value of the measured input signal.
It is expressed as a percentage or in decibels (dB).
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9768 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Ultrahigh Speed IC D/A Converter |
| AD9768JD | 制造商:Rochester Electronics LLC 功能描述:AD9768 IC - Bulk |
| AD9768JQ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD9768SD | 制造商:AD 制造商全稱:Analog Devices 功能描述:Ultrahigh Speed IC D/A Converter |
| AD9768SE | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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