參數資料
型號: AD9780BCPZ
廠商: Analog Devices Inc
文件頁數: 22/32頁
文件大小: 0K
描述: IC DAC 12BT 600MSPS LVDS 72LFCSP
產品培訓模塊: DAC Architectures
標準包裝: 1
位數: 12
數據接口: 串行
轉換器數目: 2
電壓電源: 模擬和數字
功率耗散(最大): 315mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 72-VFQFN 裸露焊盤,CSP
供應商設備封裝: 72-LFCSP
包裝: 托盤
輸出數目和類型: 4 電流,單極;4 電流,雙極
采樣率(每秒): 600M
Data Sheet
AD9780/AD9781/AD9783
Rev. B | Page 29 of 32
In return-to-zero mode, the output is set to midscale every
other half clock cycle. The output is similar to the DAC output
in normal mode except that the output pulses are half the width
and half the area. Because the output pulses have half the width,
the sinc function is scaled in frequency by two and has a first
null at 2 × fDAC. Because the area of the pulses is half that of the
pulses in normal mode, the output power is half the normal
mode output power.
06936-
061
D9
D8
D7
D6
D5
D4
D3
D2
D1
D10
INPUT DATA
DAC CLK
QUAD-SWITCH
DAC OUTPUT
(
fS MIX MODE)
QUAD-SWITCH
DAC OUTPUT
(RETURN-TO-
ZERO MODE)
t
Figure 64. Mix Mode and Return-to-Zero Mode DAC Waveforms
The functions that shape the output spectrums for the three
modes of operation, normal mode, mix mode, and return-to-
zero mode, are shown in Figure 65. Switching between the
analog modes reshapes the sinc roll-off inherent at the DAC
output. This ability to change modes in the AD9780/AD9781/
AD9783 makes the parts suitable for direct IF applications. The
user can place a carrier anywhere in the first three Nyquist
zones depending on the operating mode selected. The perfor-
mance and maximum amplitude in all three Nyquist zones is
impacted by this sinc roll-off depending on where the carrier is
placed, as shown in Figure 65.
06936-
062
0
–10
–20
–30
–40
T
(f)
(d
B
)
0.5
0
1.5
1.0
2.0
(
fS)
NORMAL
MIX
RETURN-TO-ZERO
Figure 65. Transfer Function for Each Analog Operating Mode
Auxiliary DACs
Two auxiliary DACs are provided on the AD9780/AD9781/
AD9783. A functional diagram is shown in Figure 66. The
auxiliary DACs are current output devices with two output
pins, AUXP and AUXN. The active pin can be programmed to
either source or sink current. When either sinking or sourcing,
the full-scale current magnitude is 2 mA. The available compliance
range at the auxiliary DAC outputs depends on whether the output
is configured to sink or source current. When sourcing current,
the compliance voltage is 0 V to 1.6 V, but when sinking current,
the output compliance voltage is reduced to 0.8 V to 1.6 V. Either
output can be used, but only one output of the AUX DAC (P or
N) is active at any time. The inactive pin is always in a high
impedance state (>100 kΩ).
06936-
063
VBIAS
AUXP
AUXN
SINK
OR
SOURCE
POSITIVE
OR
NEGATIVE
0mA
TO
2mA
0mA
TO
2mA
Figure 66. Auxiliary DAC Functional Diagram
In a single sideband transmitter application, the combination of
the input referred dc offset voltage of the quadrature modulator
and the DAC output offset voltage can result in local oscillator
(LO) feedthrough at the modulator output, which degrades system
performance. The auxiliary DACs can be used to remove the dc
offset and the resulting LO feedthrough. The circuit configura-
tion for using the auxiliary DACs for performing dc offset
correction depends on the details of the DAC and modulator
interface. An example of a dc-coupled configuration with low-
pass filtering is shown in Figure 67.
AD9783
AUX
DAC1 OR
DAC2
AD9783
DAC1 OR
DAC2
25 TO 50
QUAD MOD
I OR Q INPUTS
QUADRATURE
MODULATOR V+
25 TO 50
06936-
064
OPTIONAL
PASSIVE
FILTERING
Figure 67. DAC DC-Coupled to Quadrature Modulator with a Passive DC Shift
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