參數(shù)資料
型號(hào)： AD9783-DPG2-EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 17/32頁(yè)
文件大小： 0K
描述： BOARD EVAL FOR AD9783
標(biāo)準(zhǔn)包裝： 1
系列： *
AD9780/AD9781/AD9783
Data Sheet
Rev. B | Page 24 of 32
SPI PORT, RESET, AND PIN MODE
In general, when the AD9780/AD9781/AD9783 are powered
up, an active high pulse applied to the RESET pin should follow.
This ensures the default state of all control register bits. In
addition, once the RESET pin goes low, the SPI port can be
activated; thus, CSB should be held high.
For applications without a controller, the AD9780/AD9781/
AD9783 also supports pin mode operation, which allows some
functional options to be pin selected without the use of the SPI
port. Pin mode is enabled anytime the RESET pin is held high.
In pin mode, the four SPI port pins take on secondary
functions, as shown in Table 13.
Table 13. SPI Pin Functions (Pin Mode)
Pin
Name
Pin Mode Function
SDIO
DATA (Register 0x02, Bit 7), bit value (1/0) equals pin
state (high/low).
CSB
Enable mix mode. If CSB is high, Register 0x0A is set
to 0x05, putting both DAC1 and DAC2 into mix mode.
SDO
Enable full power-down. If SDO is high, Register 0x03
is set to 0xFF.
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