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參數(shù)資料
| 型號： | AD9992BBCZRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | 12-Bit CCD Signal Processor with Precision Timing Generator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA105 |
| 封裝： | 8 X 8 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-225, CSPBGA-105 |
| 文件頁數(shù)： | 74/92頁 |
| 文件大小： | 718K |
| 代理商： | AD9992BBCZRL |
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AD9992
LAYOUT OF INTERNAL REGISTERS
The AD9992 address space is divided into two register areas, as
illustrated in Figure 84. In the first address space, Address 0x00
to Address 0xFF contain the registers for the AFE, miscellaneous,
VD/HD, I/O and CP, timing core, shutter and GPO, and update
control functions. The second address space, beginning at
Address 0x800, consists of the V-pattern groups, V-sequences,
and field registers. This is a configurable set of registers; the
user can decide how many V-pattern groups, V-sequences, and
fields are used in a particular design. Therefore, the addresses
for these registers vary, depending on the number of V-patterns
and V-sequences chosen.
Rev. 0 | Page 74 of 92
Address 0x28 specifies the total number of V-pattern groups
and V-sequences used. The starting address for the V-pattern
groups is always 0x800. The starting address for the
V-sequences is based on the number of V-pattern groups used,
with each V-pattern group occupying 48 register addresses. The
starting address for the field registers depends on both the
number of V-pattern groups and the number of V-sequences.
Each V-sequence occupies 40 register addresses, and each field
occupies 16 register addresses.
The starting address for the V-sequences is equal to 0x800 plus
the number of V-pattern groups times 48. The starting address
for the fields is equal to the starting address of the V-sequences
plus the number of V-sequences times 40. The V-pattern,
V-sequence, and field registers must always occupy a
continuous block of addresses.
Figure 85 shows an example in which three V-pattern groups,
four V-sequences, and two fields are used. The starting address
for the V-pattern groups is always 0x800. Since VPATNUM = 3,
the V-pattern groups occupies 144 address locations. The start
of the V-sequence registers is 0x890 (that is, 0x800 + 144). With
VSEQNUM = 4, the V-sequences occupy 160 address locations.
Therefore, the field registers begin at 0x930 (that is, 0x890 + 160).
The AD9992 address space contains many unused addresses.
Undefined addresses between Address 0x00 and Address 0xFF
should not be written to; otherwise, the AD9992 may operate
incorrectly. Continuous register writes should be performed
carefully so that undefined registers are not written to.
FIXED REGISTERAREA
ADDR 0x00
V-PATTERN GROUPS
V-SEQUENCES
CONFIGURABLE REGISTER AREA
VPAT START 0x800
FIELDS
MAX 0xFFF
VSEQ START
FIELD START
ADDR 0xFF
AFE REGISTERS
UPDATE CONTROL REGISTERS
MISCELLANEOUS REGISTERS
VD/HD REGISTERS
I/O AND CP REGISTERS
TEST REGISTERS
TIMING CORE REGISTERS
MODE REGISTERS
TEST REGISTERS
SHUTTER AND GPO REGISTERS
INVALID DO NOT ACCESS
0
Figure 84. Layout of AD9992 Registers
ADDR 0x800
ADDR 0x890
ADDR 0x930
ADDR 0x950
MAX 0xFFF
3 V-PATTERN GROUPS
(48 × 3 = 144 REGISTERS)
4 V-SEQUENCES
(40 × 4 = 160 REGISTERS)
2 FIELDS
(16 × 2 = 32 REGISTERS)
UNUSED MEMORY
0
Figure 85. Example Register Configuration
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| AD9993BBCZ | 功能描述:IC MIXED-SIGNAL FRONT END 196BGA 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態(tài):在售 類型:ADC，DAC 輸入類型:LVDS 輸出類型:LVDS 接口:SPI 電流 - 電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:196-LFBGA，CSPBGA 供應(yīng)商器件封裝:196-CSPBGA（12x12） 標準包裝:1 |
| AD9993BBCZRL | 功能描述:IC MIXED-SIGNAL FRONT END 196BGA 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態(tài):在售 類型:ADC，DAC 輸入類型:LVDS 輸出類型:LVDS 接口:SPI 電流 - 電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:196-LFBGA，CSPBGA 供應(yīng)商器件封裝:196-CSPBGA（12x12） 標準包裝:1,500 |
| AD9993-EBZ | 功能描述:EVAL BOARD MXFE AD9993 制造商:analog devices inc. 系列:* 零件狀態(tài):在售 標準包裝:1 |
| AD9994 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit CCD Signal Processor with Precision Timing Generator |
| AD9994BCP | 制造商:Analog Devices 功能描述:AFE GEN PURPOSE 12-BIT 64LFCSP - Bulk |
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