參數(shù)資料
型號: ADA4051-1AKSZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 8/20頁
文件大?。?/td> 0K
描述: IC OPAMP RRIO ZERO DRIFT SC70-5
產(chǎn)品培訓(xùn)模塊: Top Five Problems in Photodiode Opamp Circuits
標(biāo)準(zhǔn)包裝: 1
放大器類型: 斷路器(零漂移)
電路數(shù): 1
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 0.06 V/µs
增益帶寬積: 125kHz
電流 - 輸入偏壓: 20pA
電壓 - 輸入偏移: 2µV
電流 - 電源: 15µA
電流 - 輸出 / 通道: 15mA
電壓 - 電源,單路/雙路(±): 1.8 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 6-TSSOP(5 引線),SC-88A,SOT-353
供應(yīng)商設(shè)備封裝: SC-70-5
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: ADA4051-1AKSZ-R7DKR
ADA4051-1/ADA4051-2
Rev. B | Page 16 of 20
The design architecture of the ADA4051-1/ADA4051-2
specifically targets precision signal conditioning applications
requiring accurate and stable performance from dc to 10 Hz
bandwidth. In summary, the main features of the ADA4051-1/
ADA4051-2 chopper amplifiers are
Considerable suppression of the offset-related ripple
No affect on the desired input signal as long as its
frequency is much lower than the chopping frequency
shown in Figure 60
Achievement of low offset similar to a conventional
chopper amplifier
No introduction of excess noise
The ADA4051-1/ADA4051-2 chopper amplifiers provide a rail-
to-rail input range with a 1.8 V to 5.5 V supply voltage range and
20 μA supply current consumption over the 40°C to +125°C
extended industrial temperature range. The gain bandwidth is
125 kHz as a unity-gain stable amplifier up to 100 pF load
capacitance.
INPUT VOLTAGE RANGE
The ADA4051-1/ADA4051-2 have internal ESD protection diodes.
These diodes are connected between the inputs and each supply
rail to protect the input MOSFETs from an electrical discharge
event and are reversed-biased during normal operation. This
protection scheme allows voltages as high as approximately 0.3 V
beyond the supplies (±VSY ± 0.3 V) to be applied at the input of
either terminal without causing permanent damage.
If either input exceeds one of the supply rails by more than 0.3 V,
these ESD diodes become forward-biased and large amounts of
current begin to flow through them. Without current limiting, this
excessive current would cause permanent damage to the device.
If the inputs are expected to be subject to overvoltage conditions,
install a resistor in series with each input to limit the input current
to 10 mA maximum.
The ADA4051-1/ADA4051-2 also have internal circuitry that
protects the input stage from high differential voltages. This
circuitry is composed of internal 1.33 kΩ resistors in series with
each input and back-to-back diode-connected N-MOSFET (with a
typical VT of 0.7 V for a VCM of 0 V) after these series resistors. With
normal negative feedback operating conditions, the ADA4051-1/
ADA4051-2 amplifiers correct their output to ensure that the two
inputs are at the same voltage. However, if the device is configured
as a comparator or there are unusual operating conditions, the
input voltages can be forced to different potentials, which may
cause excessive current to flow through the internal diode-
connected N-MOSFETs.
Although the ADA4051-1/ADA4051-2 are rail-to-rail input
amplifiers, take care to ensure that the potential difference
between the inputs does not exceed ±VSY to avert permanent
damage to the device.
OUTPUT PHASE REVERSAL
Although output phase reversal can occur with other amplifiers
when the input common-mode voltage range is exceeded, the
ADA4051-1/ADA4051-2 amplifiers are designed to prevent
any output phase reversal, provided both inputs are maintained
approximately within 0.3 V above and below the supply voltages
(±VSY ± 0.3 V).
With other amplifiers, the outputs may jump in the opposite
direction to the supply rail when a common-mode voltage
moves outside the common-mode range. This usually occurs
when one of the internal stages of the amplifier no longer has
sufficient bias voltage across it and subsequently turns off.
However, with the ADA4051-1/ADA4051-2 amplifiers, if one
or both inputs exceed the input voltage range but remain within
the ±VSY ± 0.3 V range, an internal loop opens and the output
remains in saturation mode, without phase reversal, until the
input voltage is brought back to within the input voltage range
limits as shown in Figure 55 and Figure 58.
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