參數(shù)資料
型號: ADA4410-6ACPZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 6/16頁
文件大小: 0K
描述: IC VIDEO FILTER SELECT 32-LFCSP
標(biāo)準(zhǔn)包裝: 5,000
類型: 視頻濾波器
應(yīng)用: 錄音機(jī),機(jī)頂盒
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 32-LFCSP-VQ(5x5)
包裝: 帶卷 (TR)
ADA4410-6
Rev. B | Page 14 of 16
As previously discussed, the composite video output is
developed by passively summing the Y and C outputs that have
passed through their respective output gain stages, then multiplying
this sum by a factor of two to obtain the output (see Figure 1).
The offset of this output is equal to 2× that of the other outputs.
Because of this, in many cases, it is necessary to ac-couple the
CV output or ensure that it is connected to an input that is ac-
coupled. This is generally not an issue because it is common
practice to employ ac coupling on composite video inputs.
The maximum differential voltage that can be applied across the
LEVEL1 and LEVEL2 inputs is ±500 mV. From a single-ended
standpoint, the LEVEL1 and LEVEL2 inputs have the same
range as the filter inputs. See the Specifications tables for the
limits. The LEVEL1 and LEVEL2 inputs must each be bypassed
to GND with a 0.1 μF ceramic capacitor.
In single-supply applications, a positive output offset must be
applied to keep the negative-most excursions of the output
signals above the specified minimum output swing limit.
Figure 23 and Figure 24 illustrate several ways to use the
LEVEL1 and LEVEL2 inputs. Figure 23 shows an example of
how to generate fully adjustable LEVEL1 and LEVEL2 voltages
from ±5 V and single +5 V supplies. These circuits show a
general case, but a more practical approach is to fix one voltage
and vary the other. Figure 24 illustrates an effective way to
produce a 600 mV output offset voltage in a single-supply
application. Although the LEVEL2 input could simply be
connected to GND, Figure 24 includes bypassed resistive
voltage dividers for each input so that the input levels can be
changed, if necessary. Additionally, many in-circuit testers
require that I/O signals not be tied directly to the supplies or
GND. DNP indicates do not populate.
0
526
5-
0
48
DUAL SUPPLY
0.1F
LEVEL1
9.53k
1k
9.53k
+5V
–5V
0.1F
LEVEL2
9.53k
1k
9.53k
+5V
–5V
SINGLE SUPPLY
0.1F
LEVEL1
1k
9.09k
+5V
0.1F
LEVEL2
1k
9.09k
+5V
Figure 23. Generating Fully Adjustable Output Offsets
05265-
049
0.1
μF
LEVEL1
634
Ω
10k
Ω
+5V
DNP
LEVEL2
0
Ω
DNP
+5V
Figure 24. Flexible Circuits to Set the LEVEL1 and LEVEL2 Inputs to Obtain
a 600 mV Output Offset on a Single Supply (G = ×2)
INPUT AND OUTPUT COUPLING
Inputs to the ADA4410-6 are normally dc-coupled. Ac coupling
the inputs is not recommended; however, if ac coupling is
necessary, suitable circuitry must be provided following the ac
coupling element to provide proper dc level and bias currents at
the ADA4410-6 input stages.
The ADA4410-6 outputs can be either ac- or dc-coupled. As
discussed in the Output DC Offset Control section, the CV
output offset is different from the other outputs, and the CV
output is generally ac-coupled.
When driving single ac-coupled loads in standard 75 Ω video
distribution systems, 220 μF coupling capacitors are recommended
for use on all but the chrominance signal output. Because the
chrominance signal is a narrow-band modulated carrier, it has
no low frequency content and can therefore be coupled with a
0.1 μF capacitor.
There are two ac coupling options when driving two loads from
one output. One is to simply use the same value capacitor on
the second load, while the other is to use a common coupling
capacitor that is at least twice the value used for the single load
0
52
65
-05
4
75
CABLE
75
CABLE
220F
75
Figure 25. Driving Two AC-Coupled Loads with Two Coupling Capacitors
05
26
5
-05
5
75
CABLE
75
CABLE
75
470F
Figure 26. Driving Two AC-Coupled Loads with One Common Coupling Capacitor
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