The power dissipated in the package (P
參數(shù)資料
型號: ADA4411-3ARQZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 12/16頁
文件大?。?/td> 0K
描述: IC HD/FILTER/BUFFER/MUX 24QSOP
標準包裝: 2,500
應(yīng)用: 2:1 多路復(fù)用器-放大器
輸出類型: 滿擺幅
電路數(shù): 3
電流 - 電源: 57mA
電流 - 輸出 / 通道: 30mA
電壓 - 電源,單路/雙路(±): 4.5 V ~ 12 V,±2.25 V ~ 6 V
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 24-QSOP
包裝: 帶卷 (TR)
ADA4411-3
Rev. 0 | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Rating
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
Supply Voltage
12 V
Power Dissipation
S
) times the
quiescent current (I
Storage Temperature
–65°C to +125°C
S
). The power dissipated due to load drive
depends on the particular application. For each output, the
power due to load drive is calculated by multiplying the load
current by the associated voltage drop across the device. The
power dissipated due to all of the loads is equal to the sum of
the power dissipations due to each individual load. RMS
voltages and currents must be used in these calculations.
Operating Temperature Range
–40°C to +85°C
Lead Temperature Range (Soldering 10 sec)
300°C
Junction Temperature
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Airflow increases heat dissipation, effectively reducing θJA.
In addition, more metal directly in contact with the package
leads from metal traces, through-holes, ground, and power
planes reduces the θ .
JA
THERMAL RESISTANCE
Figure 2 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 24-lead QSOP
(83°C/W) on a JEDEC standard 4-layer board. θ
θ is specified for the worst-case conditions, that is, θ
JA
is
specified for device soldered in circuit board for surface-mount
packages.
JA
values are
approximations.
Table 4. Thermal Resistance
0
552
7-
002
AMBIENT TEMPERATURE (
°C)
WA
TTS
–40
–20
0
20
40
60
0.5
0.7
0.9
1.1
1.3
1.5
1.7
1.9
2.1
2.3
2.5
80
Package Type
θ
Unit
JA
24 Lead QSOP
83
°C/W
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4411-3
package is limited by the associated rise in junction temperature
(TJ) on the die. At approximately 150°C, which is the glass
transition temperature, the plastic changes its properties.
Even temporarily exceeding this temperature limit may change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the ADA4411-3.
Exceeding a junction temperature of 150°C for an extended
period can result in changes in the silicon devices potentially
causing failure.
Figure 2. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
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