- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨�(m菐i)璩C缍�(w菐ng) > PDF鐩寗6068 > ADA4817-1ACPZ-R7 (Analog Devices Inc)IC OPAMP VF 410MHZ LN 8LFCSP PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | ADA4817-1ACPZ-R7 |
| 寤犲晢锛� | Analog Devices Inc |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 7/28闋�(y猫) |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC OPAMP VF 410MHZ LN 8LFCSP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1 |
| 绯诲垪锛� | FastFET™ |
| 鏀惧ぇ鍣ㄩ鍨嬶細 | 闆诲鍙嶉 |
| 闆昏矾鏁�(sh霉)锛� | 1 |
| 杞�(zhu菐n)鎻涢€熺巼锛� | 870 V/µs |
| 澧炵泭甯跺绌嶏細 | 410MHz |
| -3db甯跺锛� | 1.05GHz |
| 闆绘祦 - 杓稿叆鍋忓锛� | 2pA |
| 闆诲 - 杓稿叆鍋忕Щ锛� | 400µV |
| 闆绘祦 - 闆绘簮锛� | 19mA |
| 闆绘祦 - 杓稿嚭 / 閫氶亾锛� | 40mA |
| 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� | 5 V ~ 10 V锛�±2.5 V ~ 5 V |
| 宸ヤ綔婧害锛� | -40°C ~ 105°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 8-VFDFN 瑁搁湶鐒婄洡(p谩n)锛孋SP |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 8-LFCSP-VD锛�3x3锛� |
| 鍖呰锛� | 妯�(bi膩o)婧�(zh菙n)鍖呰 |
| 鐢�(ch菐n)鍝佺洰閷勯爜(y猫)闈細 | 768 (CN2011-ZH PDF) |
| 鍏跺畠鍚嶇ū锛� | ADA4817-1ACPZ-R7DKR |
绗�1闋�(y猫)绗�2闋�(y猫)绗�3闋�(y猫)绗�4闋�(y猫)绗�5闋�(y猫)绗�6闋�(y猫)鐣�(d膩ng)鍓嶇7闋�(y猫)绗�8闋�(y猫)绗�9闋�(y猫)绗�10闋�(y猫)绗�11闋�(y猫)绗�12闋�(y猫)绗�13闋�(y猫)绗�14闋�(y猫)绗�15闋�(y猫)绗�16闋�(y猫)绗�17闋�(y猫)绗�18闋�(y猫)绗�19闋�(y猫)绗�20闋�(y猫)绗�21闋�(y猫)绗�22闋�(y猫)绗�23闋�(y猫)绗�24闋�(y猫)绗�25闋�(y猫)绗�26闋�(y猫)绗�27闋�(y猫)绗�28闋�(y猫)
Data Sheet
ADA4817-1/ADA4817-2
Rev. B | Page 15 of 28
The voltage error due to Ib+ and Ib鈥� is minimized if RS = RF || RG
(though with the ADA4817-1/ADA4817-2 input currents in the
picoamp range, this is likely not a concern). To include common-
mode effects and power supply rejection effects, total VOS can be
modeled by
CMR
V
PSR
V
CM
S
nom
OS
螖
+
=
(11)
where:
nom
OS
V
is the offset voltage specified at nominal conditions.
螖VS is the change in power supply from nominal conditions.
PSR is the power supply rejection.
螖VCM is the change in common-mode voltage from nominal
conditions.
CMR is the common-mode rejection.
WIDEBAND OPERATION
The ADA4817-1/ADA4817-2 provides excellent performance as
a high speed buffer. Figure 41 shows the circuit used for wideband
characterization for high gains. The impedance at the summing
junction (RF || RG) forms a pole in the loop response of the amp-
lifier with the amplifier鈥檚 input capacitance of 1.3 pF. This pole
can cause peaking and ringing if its frequency is too low. Feed-
back resistances of 100 to 400 are recommended because
they minimize the peaking and they do not degrade the
performance of the output stage. Peaking in the frequency
response can also be compensated for with a small feedback
capacitor (CF) in parallel with the feedback resistor, or a series
resistor in the noninverting input, as shown in Figure 45.
The distortion performance depends on a number of variables:
The closed-loop gain of the application
Whether it is inverting or noninverting
Amplifier loading
Signal frequency and amplitude
Board layout
The best performance is usually obtained in the G + 1
configuration with no feedback resistance, big output
load resistors, and small board parasitic capacitances.
DRIVING CAPACITIVE LOADS
In general, high speed amplifiers have a difficult time driving
capacitive loads. This is particularly true in low closed-loop
gains, where the phase margin is the lowest. The difficulty
arises because the load capacitance, CL, forms a pole with the
output resistance, RO, of the amplifier. The pole can be described
by the following equation:
L
O
P
C
R
f
2蟺
1
=
(12)
If this pole occurs too close to the unity-gain crossover point,
the phase margin degrades. This is due to the additional phase
loss associated with the pole.
Note that such capacitance introduces significant peaking in the
frequency response. Larger capacitance values can be driven but
must use a snubbing resistor (RSNUB) at the output of the amplifier,
SNUB, creates
a zero that cancels the pole introduced by the load capacitance.
Typical values for RSNUB can range from 10 to 50 . The value is
typically based on the circuit requirements. Figure 45 also shows
another way to reduce the effect of the pole created by the capacitive
load (CL) by placing a capacitor (CF) in the feedback loop parallel
to the feedback resistor Typical capacitor values can range from
0.5 pF to 2 pF. Figure 46 shows the effect of adding a feedback
capacitor to the frequency response.
VIN
VOUT
0.1F
10F
+VS
鈥揤S
49.9
RL
0.1F
CL
+
10F
+
RF
RSNUB
CF
RG
07756-
143
Figure 45. RSNUB or CF Used to Reduce Peaking
THERMAL CONSIDERATIONS
With 10 V power supplies and 19 mA quiescent current, the
ADA4817-1/ADA4817-2 dissipate 190 mW with no load. This
implies that in the LFCSP, whose thermal resistance is 94掳C/W for
the ADA4817-1 and 64掳C/W for the ADA4817-2, the junction
temperature is typically almost 25掳 higher than the ambient tem-
perature. The ADA4817-1/ADA4817-2 are designed to maintain a
constant bandwidth over temperature; therefore, an initial ramp up
of the current consumption during warm-up is expected. The VOS
temperature drift is below 8 V/掳C; therefore, it can change up to
0.3 mV due to warm-up effects for an ADA4817-1/ADA4817-2
in a LFCSP on 10 V. The input bias current increases by a factor
of 1.7 for every 10掳C rise in temperature.
Heavy loads increase power dissipation and raise the chip
junction temperature as described in the Absolute Maximum
Ratings section. Take care not to exceed the rated power
dissipation of the package.
POWER-DOWN OPERATION
The ADA4817-1/ADA4817-2 are equipped with separate power-
down pins (PD) for each amplifier. This allows the user the ability
to reduce the quiescent supply current when an amplifier is
inactive from 19 mA to below 2 mA. The power-down threshold
levels are derived from the voltage applied to the +VS pin. In 卤5 V
supply application, the enable voltage is greater than +4 V, and in a
+3 V, 2 V supply application, the enable voltage is greater than
+2 V. However, the amplifier is powered down whenever the
voltage applied to PD is 3 V below +VS. If the PD pin is not used,
connect it to the positive supply to ensure proper start-up.
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| 4-103741-0-19 | CONN HEADR BRKWAY .100 19POS STR |
| 61202022821 | HEADER 20POS PIN LATCH PCB 2ROW |
| GB1205PHV2-8AY | BLOWER 12VDC 51.6 X 51.6 X 15MM |
| 0388003.MXEP | FUSE 250V PT FA 3AG METI B 3A |
| 0388002.MXP | FUSE 250V FA 3AG METI B 2A |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| ADA4817-1ACPZ-RL | 鍔熻兘鎻忚堪:IC OPAMP VF 410MHZ LN 8LFCSP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:FastFET™ 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:J-FET 闆昏矾鏁�(sh霉):2 杓稿嚭椤炲瀷:- 杞�(zhu菐n)鎻涢€熺巼:3.5 V/µs 澧炵泭甯跺绌�:1MHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:30pA 闆诲 - 杓稿叆鍋忕Щ:2000µV 闆绘祦 - 闆绘簮:200µA 闆绘祦 - 杓稿嚭 / 閫氶亾:- 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):7 V ~ 36 V锛�±3.5 V ~ 18 V 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:閫氬瓟 灏佽/澶栨:8-DIP锛�0.300"锛�7.62mm锛� 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-PDIP 鍖呰:绠′欢 |
| ADA4817-1ARD-EBZ | 鍔熻兘鎻忚堪:BOARD EVAL FOR ADA4817 SOIC RoHS:鏄� 椤炲垾:绶ㄧ▼鍣�锛岄枊(k膩i)鐧�(f膩)绯荤当(t菕ng) >> 瑭�(p铆ng)浼版澘 - 閬�(y霉n)绠楁斁澶у櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- |
| ADA4817-1ARDZ | 鍔熻兘鎻忚堪:IC OPAMP VF 410MHZ LN 40MA 8SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:FastFET™ 妯�(bi膩o)婧�(zh菙n)鍖呰:2,500 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:閫氱敤 闆昏矾鏁�(sh霉):4 杓稿嚭椤炲瀷:- 杞�(zhu菐n)鎻涢€熺巼:0.6 V/µs 澧炵泭甯跺绌�:1MHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:45nA 闆诲 - 杓稿叆鍋忕Щ:2000µV 闆绘祦 - 闆绘簮:1.4mA 闆绘祦 - 杓稿嚭 / 閫氶亾:40mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):3 V ~ 32 V锛�±1.5 V ~ 16 V 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:14-TSSOP锛�0.173"锛�4.40mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:14-TSSOP 鍖呰:甯跺嵎 (TR) 鍏跺畠鍚嶇ū:LM324ADTBR2G-NDLM324ADTBR2GOSTR |
| ADA4817-1ARDZ-R7 | 鍔熻兘鎻忚堪:IC OPAMP VF 410MHZ LN 40MA 8SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:FastFET™ 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:閫氱敤 闆昏矾鏁�(sh霉):4 杓稿嚭椤炲瀷:婊挎摵骞� 杞�(zhu菐n)鎻涢€熺巼:0.028 V/µs 澧炵泭甯跺绌�:105kHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:3nA 闆诲 - 杓稿叆鍋忕Щ:100µV 闆绘祦 - 闆绘簮:3.3µA 闆绘祦 - 杓稿嚭 / 閫氶亾:12mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):2.7 V ~ 12 V锛�±1.35 V ~ 6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:14-TSSOP锛�0.173"锛�4.40mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:14-TSSOP 鍖呰:鍓垏甯� (CT) 鍏跺畠鍚嶇ū:OP481GRUZ-REELCT |
| ADA4817-1ARDZ-RL | 鍔熻兘鎻忚堪:IC OPAMP VF 410MHZ LN 40MA 8SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:FastFET™ 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:閫氱敤 闆昏矾鏁�(sh霉):4 杓稿嚭椤炲瀷:婊挎摵骞� 杞�(zhu菐n)鎻涢€熺巼:0.028 V/µs 澧炵泭甯跺绌�:105kHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:3nA 闆诲 - 杓稿叆鍋忕Щ:100µV 闆绘祦 - 闆绘簮:3.3µA 闆绘祦 - 杓稿嚭 / 閫氶亾:12mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):2.7 V ~ 12 V锛�±1.35 V ~ 6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:14-TSSOP锛�0.173"锛�4.40mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:14-TSSOP 鍖呰:鍓垏甯� (CT) 鍏跺畠鍚嶇ū:OP481GRUZ-REELCT |
鐧�(f膩)甯冪穵鎬ラ噰璩�(g貌u)锛�3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京(f霉)銆�
