參數(shù)資料
型號: ADA4898-1YRDZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 8/20頁
文件大小: 0K
描述: IC OPAMP VF ULN ULDIST 8SOIC
標準包裝: 1,000
放大器類型: 電壓反饋
電路數(shù): 1
轉(zhuǎn)換速率: 55 V/µs
-3db帶寬: 65MHz
電流 - 輸入偏壓: 100nA
電壓 - 輸入偏移: 20µV
電流 - 電源: 7.9mA
電流 - 輸出 / 通道: 40mA
電壓 - 電源,單路/雙路(±): ±4.5 V ~ 16.5 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm Width)裸露焊盤
供應商設(shè)備封裝: 8-SOIC-EP
包裝: 帶卷 (TR)
ADA4898-1/ADA4898-2
Data Sheet
Rev. D | Page 16 of 20
NOISE
To analyze the noise performance of an amplifier circuit, identify
the noise sources, and then determine if each source has a
significant contribution to the overall noise performance of the
amplifier. To simplify the noise calculations, noise spectral densities
were used rather than actual voltages to leave bandwidth out of the
expressions. Noise spectral density, which is generally expressed
in nV/√Hz, is equivalent to the noise in a 1 Hz bandwidth.
The noise model shown in Figure 49 has six individual noise
sources: the Johnson noise of the three resistors, the op amp
voltage noise, and the current noise in each input of the amplifier.
Each noise source has its own contribution to the noise at the
output. Noise is generally specified as referring to input (RTI),
but it is often simpler to calculate the noise referred to the
output (RTO) and then divide by the noise gain to obtain the RTI
noise.
GAIN FROM
B TO OUTPUT
= –
R2
R1
GAIN FROM
A TO OUTPUT
=
NOISE GAIN =
NG = 1 +
R2
R1
IN–
VN
VN, R1
VN, R3
R1
R2
IN+
R3
4kTR2
4kTR1
4kTR3
VN, R2
B
A
VN2 + 4kTR3 + 4kTR1
R2
2
R1 + R2
IN+2R32 + IN–2
R1 × R2
2
+ 4kTR2
R1
2
R1 + R2
RTI NOISE =
RTO NOISE = NG × RTI NOISE
VOUT
+
07037-
045
Figure 49. Op Amp Noise Analysis Model
All resistors have a Johnson noise that is calculated by
)
(4kBTR
where:
k is Boltzmann’s constant (1.38 × 1023 J/K).
B is the bandwidth in Hertz.
T is the absolute temperature in Kelvin.
R is the resistance in ohms.
A simple relationship that is easy to remember is that a 50
resistor generates a Johnson noise of 1 nV/√Hz at 25°C.
In applications where noise sensitivity is critical, care must be
taken not to introduce other significant noise sources to the
amplifier. Each resistor is a noise source. Attention to the
following areas is critical to maintain low noise performance:
design, layout, and component selection. A summary of noise
performance for the amplifier and associated resistors is shown
CIRCUIT CONSIDERATIONS
Careful and deliberate attention to detail when laying out the
ADA4898 board yields optimal performance. Power supply
bypassing, parasitic capacitance, and component selection all
contribute to the overall performance of the amplifier.
PCB LAYOUT
Because the ADA4898 has a small signal bandwidth of 65 MHz, it
is essential that high frequency board layout techniques be
employed. All ground and power planes under the pins of the
ADA4898 should be cleared of copper to prevent the formation of
parasitic capacitance between the input pins to ground and the
output pins to ground. A single mounting pad on a SOIC
footprint can add as much as 0.2 pF of capacitance to ground if
the ground plane is not cleared from under the mounting pads.
POWER SUPPLY BYPASSING
Power supply bypassing for the ADA4898 has been optimized
for frequency response and distortion performance. Figure 47
shows the recommended values and location of the bypass
capacitors. Power supply bypassing is critical for stability,
frequency response, distortion, and PSR performance. The 0.1 F
capacitors shown in Figure 47 should be as close to the supply
pins of the ADA4898 as possible. The 10 F electrolytic
capacitors should be adjacent to, but not necessarily close to,
the 0.1 F capacitors. The capacitor between the two supplies
helps improve PSR and distortion performance. In some cases,
additional paralleled capacitors can help improve frequency
and transient response.
GROUNDING
Ground and power planes should be used where possible. Ground
and power planes reduce the resistance and inductance of the
power planes and ground returns. The returns for the input
and output terminations, bypass capacitors, and RG should all
be kept as close to the ADA4898 as possible. The output load
ground and the bypass capacitor grounds should be returned to
the same point on the ground plane to minimize parasitic trace
inductance, ringing, and overshoot and to improve distortion
performance.
The ADA4898 package features an exposed paddle. For optimum
electrical and thermal performance, solder this paddle to a nega-
tive supply plane.
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