參數(shù)資料
型號(hào)： ADC10832CIWM
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 模擬信號(hào)調(diào)理
英文描述： 10-Bit Plus Sign Serial I/O A/D Converters with MUX, Sample/Hold and Reference
中文描述： SPECIALTY ANALOG CIRCUIT, PDSO20
封裝： 0.300 INCH, PLASTIC, SOP-20
文件頁(yè)數(shù)： 22/30頁(yè)
文件大?。?/td> 453K
代理商： ADC10832CIWM
Applications Hints
(Continued)
3.0 APPLICATIONS INFORMATION
3.1 Multiplexer Configuration
The design of these converters utilizes a sampled-data
comparator structure, which allows a differential analog in-
put to be converted by the successive approximation rou-
tine.
The actual voltage converted is always the difference be-
tween an assigned ‘‘
a
’’ input terminal and a ‘‘
b
’’ input ter-
minal. The polarity of each input terminal or pair of input
terminals being converted indicates which line the converter
expects to be the most positive.
A unique input multiplexing scheme has been utilized to pro-
vide multiple analog channels. The input channels can be
software configured into three modes: differential, single-
ended, or pseudo-differential.Figure 12 illustrates the three
modes using the 4-channel MUX of the ADC10834. The
eight inputs of the ADC10838 can also be configured in any
of the three modes. The single-ended mode has CH0–CH3
assigned as the positive input with COM serving as the neg-
ative input. In the differential mode, the ADC10834 channel
inputs are grouped in pairs, CH0 with CH1 and CH2 with
CH3. The polarity assignment of each channel in the pair is
interchangeable. Finally, in the pseudo-differential mode
CH0–CH3 are positive inputs referred to COM which is now
a pseudo-ground. This pseudo-ground input can be set to
any potential within the input common-mode range of the
converter. The analog signal conditioning required in trans-
ducer-based data acquisition systems is significantly simpli-
fied with this type of input flexibility. One converter package
can now handle ground-referred inputs and true differential
inputs as well as signals referred to a specific voltage.
The analog input voltages for each channel can range from
50 mV below V
b
to 50 mV above V
a
e
DV
a
e
AV
a
without degrading conversion accuracy. If the voltage on an
unselected channel exceeds these limits it may corrupt the
reading of the selected channel.
3.2 Reference Considerations
The voltage difference between the V
REF
a
and V
REF
b
in-
puts defines the analog input voltage span (the difference
between V
IN
(Max) and V
IN
(Min)) over which 1023 positive
and 1024 negative possible output codes apply.
The value of the voltage on the V
REF
a
or V
REF
b
inputs
can be anywhere between AV
a
a
50 mV and GND
b
50 mV, so long as V
REF
a
is greater than V
REF
b
. The
ADC10831/2/4/8 can be used in either ratiometric applica-
tions or in systems requiring absolute accuracy. The refer-
ence pins must be connected to a voltage source capable
of driving the minimum reference input resistance of 5 k
X
.
The
internal
2.5V
bandgap
ADC10831/2/4/8 is available as an output on the V
Out
pin. To ensure optimum performance this output needs to
be bypassed to ground with 100
m
F aluminum electrolytic or
tantalum capacitor. The reference output can be unstable
with capacitive loads greater than 100 pF and less than
100
m
F. Any capacitive loading less than 100 pF and
greater than 100
m
F will not cause oscillation. Lower
reference
in
the
output noise can be obtained by increasing the output ca-
pacitance. A 100
m
F capacitor will yield a typical noise floor
of 200 nV/
Hz. The pseudo-differential and differential mul-
tiplexer modes allow for more flexibility in the analog input
voltage range since the ‘‘zero’’ reference voltage is set by
the actual voltage applied to the assigned negative input
pin.
In a ratiometric system (Figure 13a), the analog input volt-
age is proportional to the voltage used for the A/D refer-
ence. This voltage may also be the system power supply, so
V
REF
a
can also be tied to AV
a
. This technique relaxes the
stability requirements of the system reference as the analog
input and A/D reference move together maintaining the
same output code for a given input condition.
For absolute accuracy(Figure 13b), where the analog input
varies between very specific voltage limits, the reference pin
can be biased with a time- and temperature-stable voltage
source that has excellent initial accuracy. The LM4040,
LM4041 and LM185 references are suitable for use with the
ADC10831/2/4/8.
The minimum value of V
REF
(V
REF
e
V
REF
a
–V
REF
b
) can
be quite small (see Typical Performance Characteristics) to
allow direct conversion of transducer outputs providing less
than a 5V output span. Particular care must be taken with
regard to noise pickup, circuit layout and system error volt-
age sources when operating with a reduced span due to the
increased sensitivity of the converter (1 LSB equals V
REF
/
1024).
3.3 The Analog Inputs
Due to the sampling nature of the analog inputs, at the clock
edges short duration spikes of current will be seen on the
selected assigned negative input. Input bypass capacitors
should not be used if the source resistance is greater than
1 k
X
since they will average the AC current and cause an
effective DC current to flow through the analog input source
resistance. An op amp RC active lowpass filter can provide
both impedance buffering and noise filtering should a high
impedance signal source be required. Bypass capacitors
may be used when the source impedance is very low with-
out any degradation in performance.
In a true differential input stage, a signal that is common to
both
‘‘
a
’’
and
‘‘
b
’’
inputs
ADC10831/2/4/8, the positive input of a selected channel
pair is only sampled once before the start of a conversion
during the acquisition time (t
A
). The negative input needs to
be stable during the complete conversion sequence be-
cause it is sampled before each decision in the SAR se-
quence. Therefore, any AC common-mode signal present
on the analog inputs will not be completely canceled and
will cause some conversion errors. For a sinusoid common-
mode signal this error is:
V
ERROR
(max)
e
V
PEAK
(2
q
f
CM
) (t
C
)
where f
CM
is the frequency of the common-mode signal,
V
PEAK
is its peak voltage value, and t
C
is the A/D’s conver-
sion time (t
C
e
12/f
CLK
). For example, for a 60 Hz com-
mon-mode signal to generate a
(/4
LSB error (0.61 mV) with
a 4.8
m
s conversion time, its peak value would have to be
approximately 337 mV.
is
canceled.
For
the
22
相關(guān)PDF資料
PDF描述
ADC10834 NiCd/NiMH Charge Controller with Negative dV and Peak Voltage Detection Termination 8-PDIP 0 to 70
ADC10834CIN 10-Bit Plus Sign Serial I/O A/D Converters with MUX, Sample/Hold and Reference
ADC10834CIWM NiCd/NiMH Charge Controller with Negative dV and Peak Voltage Detection Termination 8-SOIC 0 to 70
ADC10838 10-Bit Plus Sign Serial I/O A/D Converters with MUX, Sample/Hold and Reference
ADC10838CIWM 10-Bit Plus Sign Serial I/O A/D Converters with MUX, Sample/Hold and Reference
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADC10834 制造商:NSC 制造商全稱:National Semiconductor 功能描述:10-Bit Plus Sign Serial I/O A/D Converters with MUX, Sample/Hold and Reference
ADC10834CIN 制造商:NSC 制造商全稱:National Semiconductor 功能描述:10-Bit Plus Sign Serial I/O A/D Converters with MUX, Sample/Hold and Reference
ADC10834CIWM 制造商:NSC 制造商全稱:National Semiconductor 功能描述:10-Bit Plus Sign Serial I/O A/D Converters with MUX, Sample/Hold and Reference
ADC10838 制造商:NSC 制造商全稱:National Semiconductor 功能描述:10-Bit Plus Sign Serial I/O A/D Converters with MUX, Sample/Hold and Reference
ADC10838CIN 制造商:NSC 制造商全稱:National Semiconductor 功能描述:10-Bit Plus Sign Serial I/O A/D Converters with MUX, Sample/Hold and Reference
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*