參數(shù)資料
型號: ADC1175-50CIJMX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: ADC
英文描述: 8-Bit, 50 MSPS, 125 mW A/D Converter
中文描述: 1-CH 8-BIT RESISTANCE LADDER ADC, PARALLEL ACCESS, PDSO24
封裝: SOIC-24
文件頁數(shù): 13/17頁
文件大小: 487K
代理商: ADC1175-50CIJMX
Applications Information
(Continued)
If reference voltages are desired that are more than a few
tens of millivolts from the self-bias values, the circuit of Fig-
ure 5 will allow forcing the reference voltages to whatever
levels are desired. This circuit provides the best performance
because of the low source impedance of the transistors.
Note that the V
RTS
and V
RBS
pins are left floating.
V
RT
can be anywhere between V
RB
+ 1.0V and the analog
supply voltage, and V
RB
can be anywhere between ground
and 1.0V below V
RT
. To minimize noise effects and ensure
accurate conversions, the total reference voltage range (V
RT
- V
) should be a minimum of 1.0V and a maximum of
about 2.8V.
3.0 Power Supply Considerations
Many A/D converters draw sufficient transient current to cor-
rupt their own power supplies if not adequately bypassed. A
10μF tantalum or aluminum electrolytic capacitor should be
placed within an of inch (2.5 centimeters) of the A/D power
pins, with a 0.1 μF ceramic chip capacitor placed as close as
possible to the converter’s power supply pins. Leadless chip
capacitors are preferred because they have low lead induc-
tance.
While a single voltage source should be used for the analog
and digital supplies of the ADC1175, these supply pins
should be well isolated from each other to prevent any digital
noise from being coupled to the analog power pins. A 47
Ohm resistor is recommend between the analog and digital
supply lines, with a ceramic capacitor close to the analog
supply pin. Avoid inductive components in the analog supply
line.
The converter digital supply should
not
be the supply that is
used for other digital circuitry on the board. It should be the
same supply used for the A/D analog supply.
As is the case with all high speed converters, the ADC1175
should be assumed to have little power supply rejection, es-
pecially when self-biasing is used by connecting V
RT
and
V
RTS
together.
No pin should ever have a voltage on it that is in excess of
the supply voltages or below ground, not even on a trasient
DS100092-15
FIGURE 5. Driving the reference to force desired values requires driving with a low impedance source, provided by
the transistors. Note that pins 16 and 22 are not connected.
A
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