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| 型號(hào)： | ADC12034CIN |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | RES 536K OHM 1/16W 1% 0402 SMD |
| 中文描述： | 4-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP24 |
| 封裝： | DIP-24 |
| 文件頁數(shù)： | 10/41頁 |
| 文件大?。?/td> | 1036K |
| 代理商： | ADC12034CIN |
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AC Electrical Characteristics
(Continued)
The following specifications apply for V
+
= V
+ = V
+ = +5.0 V
, V
+ = +4.096 V
, V
= 0 V
, 12-bit + sign conver-
sion mode, t
= t
= 3 ns, f
= f
= 8 MHz for the ADC12H030, ADC12H032, ADC12H034 and ADC12H038, f
CK
= f
SK
= 5
MHz for the ADC12030, ADC12032, ADC12034 and ADC12038, R
= 25
, source impedance for V
+ and V
≤
25
,
fully-differential input with fixed 2.048V common-mode voltage, and 10(t
) acquisition time unless otherwise specified.
Bold-
face limits apply for T
A
= T
J
= T
MIN
to T
MAX
;
all other limits T
A
= T
J
= 25C. (Note 17)
Symbol
Parameter
Conditions
Typical
(Note 10)
10
10
12
12
25
Limits
(Note 11)
30
30
30
30
45
Units
(Limits)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
t
RDO
DO Rise Time, TRI-STATE to High
DO Rise Time, Low to High
DO Fall Time, TRI-STATE to Low
DO Fall Time, High to Low
Delay from CS Falling Edge
to DOR Falling Edge
Delay from Serial Data Clock Falling
Edge to DOR Rising Edge
Capacitance of Logic Inputs
Capacitance of Logic Outputs
R
L
= 3k, C
L
= 100 pF
t
FDO
R
L
= 3k, C
L
= 100 pF
t
CD
t
SD
25
45
ns (max)
C
IN
C
OUT
10
20
pF
pF
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-
tional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed speci-
fications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 2:
All voltages are measured with respect to GND, unless otherwise specified.
Note 3:
When the input voltage (V
) at any pin exceeds the power supplies (V
<
GND or V
>
V
+ or V
+), the current at that pin should be limited to 30 mA.
The 120 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 30 mA to four.
Note 4:
The maximum power dissipation must be derated at elevated temperatures and is dictated by T
max,
θ
and the ambient temperature, T
. The maximum
allowable power dissipation at any temperature is P
D
= (T
max T
)/
θ
or the number given in the Absolute Maximum Ratings, whichever is lower. For this device,
T
J
max = 150C. The typical thermal resistance (
θ
JA
) of these parts when board mounted follow:
Thermal
Resistance
θ
JA
70C/W
64C/W
42C/W
57C/W
50C/W
Part Number
ADC12H030CIWM, ADC12030CIWM
ADC12H032CIWM, ADC12032CIWM
ADC12H034CIN, ADC12034CIN
ADC12H034CIWM, ADC12034CIWM
ADC12H038CIWM, ADC12038CIWM
Note 5:
The human body model is a 100 pF capacitor discharged through a 1.5 k
resistor into each pin.
Note 6:
See AN450 “Surface Mounting Methods and Their Effect on Product Reliability” or the section titled “Surface Mount” found in any post 1986 National Semi-
conductor Linear Data Book for other methods of soldering surface mount devices.
Note 7:
Two on-chip diodes are tied to each analog input through a series resistor as shown below. Input voltage magnitude up to 5V above V
+ or 5V below GND
will not damage this device. However, errors in the A/D conversion can occur (if these diodes are forward biased by more than 50 mV) if the input voltage magnitude
of selected or unselected analog input go above V
A
+ or below GND by more than 50 mV. As an example, if V
A
+ is 4.5 V
DC
, full-scale input voltage must be
≤
4.55
V
DC
to ensure accurate conversions.
Note 8:
To guarantee accuracy, it is required that the V
A
+ and V
D
+ be connected together to the same power supply with separate bypass capacitors at each V
+
pin.
DS011354-2
www.national.com
10
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