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參數(shù)資料
| 型號： | ADC12038CIWM |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold |
| 中文描述： | 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO28 |
| 封裝： | SOP-28 |
| 文件頁數(shù)： | 11/41頁 |
| 文件大?。?/td> | 1036K |
| 代理商： | ADC12038CIWM |
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AC Electrical Characteristics
(Continued)
Note 9:
With the test condition for V
REF
(V
REF
+ V
REF
) given as +4.096V, the 12-bit LSB is 1.0 mV and the 8-bit LSB is 16.0 mV.
Note 10:
Typicals are at T
J
= T
A
= 25C and represent most likely parametric norm.
Note 11:
Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 12:
Positive integral linearity error is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through positive
full-scale and zero. For negative integral linearity error, the straight line passes through negative full-scale and zero (see Figures 2, 3).
Note 13:
Zero error is a measure of the deviation from the mid-scale voltage (a code of zero), expressed in LSB. It is the worst-case value of the code transitions
between 1 to 0 and 0 to +1 (see Figure 4).
Note 14:
Total unadjusted error includes offset, full-scale, linearity and multiplexer errors.
Note 15:
The DC common-mode error is measured in the differential multiplexer mode with the assigned positive and negative input channels shorted together.
Note 16:
Channel leakage current is measured after the channel selection.
Note 17:
Timing specifications are tested at the TTL logic levels, V
IL
= 0.4V for a falling edge and V
IH
= 2.4V for a rising edge. TRI-STATE output voltage is forced
to 1.4V.
Note 18:
The ADC12030 family’s self-calibration technique ensures linearity and offset errors as specified, but noise inherent in the self-calibration process will re-
sult in a maximum repeatability uncertainty of 0.2 LSB.
Note 19:
If SCLK and CCLK are driven from the same clock source, then t
A
is 6, 10, 18 or 34 clock periods minimum and maximum.
Note 20:
The “12-Bit Conversion of Offset” and “12-Bit Conversion of Full-Scale” modes are intended to test the functionality of the device. Therefore, the output
data from these modes are not an indication of the accuracy of a conversion result.
DS011354-10
FIGURE 1. Transfer Characteristic
DS011354-11
FIGURE 2. Simplified Error Curve vs Output Code without Auto-Calibration or Auto-Zero Cycles
www.national.com
11
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADC12038CIWM/NOPB | 功能描述:模數(shù)轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC12038CIWM/NOPB | 制造商:Texas Instruments 功能描述:A/D Converter (A-D) IC |
| ADC12038CIWMNOPB | 制造商:National Semiconductor 功能描述:ADC Single SAR 114ksps 12-bit+Sign Serial 28-Pin SOIC W Rail 制造商:National Semiconductor 功能描述:ADC Single SAR 114ksps 12-bit+Sign Serial 28-Pin SOIC Rail |
| ADC12038CIWMX | 功能描述:模數(shù)轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC12038CIWMX/NOPB | 功能描述:模數(shù)轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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