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參數(shù)資料
| 型號： | ADC12041CIV |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | 12-Bit Plus Sign 216 kHz Sampling Analog-to-Digital Converter |
| 中文描述： | 1-CH 13-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 25/28頁 |
| 文件大小： | 591K |
| 代理商： | ADC12041CIV |
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Analog Application Information
(Continued)
and 22 (DGND) the SSOP and PLCC package. The layout
diagram in Figure 21 shows the recommended placement
for the supply bypass capacitors.
PC BOARD LAYOUT AND GROUNDING
CONSIDERATlONS
To get the best possible performance from the ADC12041,
the printed circuit boards should have separate analog and
digital ground planes. The reason for using two ground
planes is to prevent digital and analog ground currents from
sharing the same path until they reach a very low impedance
power supply point. This will prevent noisy digital switching
currents from being injected into the analog ground.
Figure 21 illustrates a favorable layout for ground planes,
power supply and reference input bypass capacitors. It
shows
a
layout
using
a
through-hole assembly. A similar approach should be used
for the SSOP package.
The analog ground plane should encompass the area under
the analog pins and any other analog components such as
the reference circuit, input amplifiers, signal conditioning cir-
cuits, and analog signal traces.
The digital ground plane should encompass the area under
the digital circuits and the digital input/output pins of the
28-pin
PLCC
socket
and
ADC12041. Having a continuous digital ground plane under
the data and clock traces is very important. This reduces the
overshoot/undershoot and high frequency ringing on these
lines that can be capacitively coupled to analog circuitry sec-
tions through stray capacitances.
The AGND and DGND in the ADC12041 are not internally
connected together. They should be connected together on
the PC board right at the chip. This will provide the shortest
return path for the signals being exchanged between the in-
ternal analog and digital sections of the ADC.
It is also a good design practice to have power plane layers
in the PC board. This will improve the supply bypassing (an
effective distributed capacitance between power and ground
plane layers) and voltage drops on the supply lines. How-
ever, power planes are not as essential as ground planes are
for satisfactory performance. If power planes are used, they
should be separated into two planes and the area and con-
nections should follow the same guidelines as mentioned for
the ground planes. Each power plane should be laid out over
its associated ground planes, avoiding any overlap between
power and ground planes of different types. When the power
planes are not used, it is recommended to use separate sup-
ply traces for the V
+ and V
+ pins from a low impedance
supply point (the regulator output or the power entry point to
the PC board). This will help ensure that the noisy digital
supply does not corrupt the analog supply.
A
www.national.com
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC12041CIVX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit Plus Sign 216 kHz Sampling Analog-to-Digital Converter |
| ADC12048 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit Plus Sign 216 kHz 8-Channel Sampling Analog-to-Digital Converter |
| ADC12048_02 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit Plus Sign 216kHz 8-Channel Sampling Analog-to-Digital Converter |
| ADC12048CIV | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC12048CIV/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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