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參數(shù)資料
| 型號： | ADC12048CIV |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | 12-Bit Plus Sign 216 kHz 8-Channel Sampling Analog-to-Digital Converter |
| 中文描述： | 1-CH 13-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 3/30頁 |
| 文件大?。?/td> | 635K |
| 代理商： | ADC12048CIV |
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Pin Description
(Continued)
PLCC Pkg.
Pin Number
12
PQFP Pkg.
Pin Number
6
Pin Name
Description
V
REF
Negative reference input. The operating voltage range for this input is
0V
≤
V
REF
≤
V
REF
+ 1 (see Figure 3 and 4). This pin should be
bypassed to AGND at least with a parallel combination of a 10 μF and
a 0.1 μF (ceramic) capacitor. The capacitors should be placed as close
to the part as possible.
The inverting (negative) and non-inverting (positive) outputs of the
multiplexer. The analog inputs to the MUX selected by bits b3–b0 of
the Configuration register appear at these pins.
ADC inputs. The inverting (negative) and non-inverting (positive) inputs
into the ADC.
19
13
MUX OUT
21
15
MUX OUT+
20
22
24
14
16
18
ADCIN
ADCIN+
WMODE
The logic state of this pin at power-up determines which edge of the
write signal (WR) will latch in data from the data bus. If tied low, the
ADC12048 will latch in data on the
rising
edge of the WR signal. If tied
to a logic
high
, data will he latched in on the
falling
edge of the WR
signal. The state of this pin should not be changed after power-up.
The SYNC pin can be programmed as an
input
or an
output
. The
Configuration register’s bit b8 controls the function of this pin. When
programmed as an
input
pin (b8 = 1), a rising edge on this pin causes
the ADC’s sample-and-hold to hold the analog input signal and begin
conversion. When programmed as an
output
pin (b8 = 0), the SYNC
pin goes high when a conversion begins and returns low when
completed.
13-bit Data bus of the ADC12048. D12 is the most significant bit and
D0 is the least significant. The BW (bus width) bit of the Configuration
register (b12) selects between an 8-bit or 13-bit data bus width. When
the
BW
bit is
cleared
(BW = 0), D7–D0 are active and D12–D8 are
always in TRI-STATE. When the
BW
bit is
set
(BW = 1), D12–D0 are
active.
The clock input pin used to drive the ADC12048. The operating range
is 0.05 MHz to 12 MHz.
WR is the active low WRITE control input pin. A logic low on this pin
and the CS will enable the input buffers of the data pins D12–D0. The
signal at this pin is used by the ADC12048 to latch in data on D12–D0.
The sense of the WMODE pin at power-up will determine which edge
of the WR signal the ADC12048 will latch in data. See WMODE pin
description.
RD is the active low read control input pin. A logic low on this pin and
CS will enable the active output buffers to drive the data bus.
CS is the active low Chip Select input pin. Used in conjunction with the
WR and RD signals to control the active data bus input/output buffers
of the data bus.
RDY is an active low output pin. The signal at this pin indicates when a
requested function has begun or ended. Refer to section
Functional
Description
and the digital timing diagrams for more detail.
This is the standby active low output pin. This pin is low when the
ADC12048 is in the standby mode and high when the ADC12048 is out
of the standby mode or has been requested to leave the standby mode.
Analog supply input pin. The device operating supply voltage range is
+5V
±
10%. Accuracy is guaranteed only if the V
A
+ and V
D
+ are
connected to the same potential. This pin should be bypassed to AGND
with a parallel combination of a 10 μF and a 0.1 μF (ceramic) capacitor.
The capacitors should be placed as close to the supply pins of the part
as possible.
25
19
SYNC
26–31
20–25
D0–D5
34–40
29–34
D6–D12
43
37
CLK
44
38
WR
1
39
RD
2
40
CS
3
41
RDY
4
42
STDBY
10
4
V
A
+
A
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC12048CIV/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC12048CIVF | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC12048CIVF/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12B PLUS SIGN 216KHz 8CH SAMPLING ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC12048CIVF/NOPB | 制造商:Texas Instruments 功能描述:A/D Converter (A-D) IC |
| ADC12048EVAL | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit Plus Sign 216 kHz 8-Channel Sampling Analog-to-Digital Converter |
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