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參數(shù)資料
| 型號： | ADC1241 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Self-Calibrating 12-Bit Plus Sign μP-Compatible A/D Converter with Sample-and-Hold(可自行校對的12位μP兼容帶采樣和保持功能的A/D轉(zhuǎn)換器) |
| 中文描述： | 自校準12位帶符號微處理器兼容的A / D轉(zhuǎn)換器的采樣保持（可自行校對的12位微處理器兼容帶采樣和保持功能的的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 5/14頁 |
| 文件大?。?/td> | 268K |
| 代理商： | ADC1241 |
AC Electrical Characteristics
(Continued)
Note 7:
A diode exists between AV
CC
and DV
CC
as shown below.
TL/H/10554–4
To guarantee accuracy, it is required that the AV
CC
and DV
CC
be connected together to a power supply with separate bypass filters at each V
CC
pin.
Note 8:
Accuracy is guaranteed at f
CLK
e
2.0 MHz. At higher and lower clock frequencies accuracy may degrade. See curves in the Typical Performance
Characteristics Section.
Note 9:
Typicals are at T
J
e
25
§
C and represent most likely parametric norm.
Note 10:
Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 11:
Positive linearity error is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through positive full scale and
zero. For negative linearity error the straight line passes through negative full scale and zero. (See Figures 1b and 1c).
Note 12:
The ADC1241’s self-calibration technique ensures linearity, full scale, and offset errors as specified, but noise inherent in the self-calibration process will
result in a repeatability uncertainty of
g
0.20 LSB.
Note 13:
If T
A
changes then an Auto-Zero or Auto-Cal cycle will have to be re-started, see the typical performance characteristic curves.
Note 14:
After an Auto-Zero or Auto-Cal cycle at the specified power supply extremes.
Note 15:
If the clock is asynchronous to the falling edge of WR an uncertainty of one clock period will exist in the interval of t
A
, therefore making the minimum t
A
e
6 clock periods and the maximum t
A
e
7 clock periods. If the falling edge of the clock is synchronous to the rising edge of WR then t
A
will be exactly 6.5 clock
periods.
Note 16:
The CAL line must be high before any other conversion is started.
Note 17:
The specifications for these parameters are valid after an Auto-Cal cycle has been completed.
Note 18:
A military RETS electrical test specification is available on request. At time of printing, the ADC1241CMJ/883 RETS specification complies fully with the
boldface
limits in this column.
TL/H/10554–5
FIGURE 1a. Transfer Characteristic
5
相關PDF資料 |
PDF描述 |
|---|---|
| ADC1241CMJ | Self-Calibrating 12-Bit Plus Sign mP-Compatible A/D Converter with Sample-and-Hold |
| ADC1241CIJ | Self-Calibrating 12-Bit Plus Sign mP-Compatible A/D Converter with Sample-and-Hold |
| ADC12441 | Dynamically-Tested Self-Calibrating 12-Bit Plus Sign A/D Converter with Sample-and-Hold(可自行校對的12位帶采樣和保持功能的A/D轉(zhuǎn)換器) |
| ADC12441883 | Dynamically-Tested Self-Calibrating 12-Bit Plus Sign A/D Converter with Sample-and-Hold |
| ADC12441CMJ | Dynamically-Tested Self-Calibrating 12-Bit Plus Sign A/D Converter with Sample-and-Hold |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADC1241BIJ | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Self-Calibrating 12-Bit Plus Sign mP-Compatible A/D Converter with Sample-and-Hold |
| ADC1241CIJ | 功能描述:IC ADC 12BIT W/S&H +SGN 28-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| ADC1241CMJ | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Self-Calibrating 12-Bit Plus Sign mP-Compatible A/D Converter with Sample-and-Hold |
| ADC1242 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| ADC1242CIJ | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit Plus Sign Sampling A/D Converter |
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