- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378284 > ADC1241CIJ (NATIONAL SEMICONDUCTOR CORP) Self-Calibrating 12-Bit Plus Sign mP-Compatible A/D Converter with Sample-and-Hold PDF資料下載
參數(shù)資料
| 型號： | ADC1241CIJ |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | Self-Calibrating 12-Bit Plus Sign mP-Compatible A/D Converter with Sample-and-Hold |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP28 |
| 封裝： | CERAMIC, DIP-28 |
| 文件頁數(shù)： | 4/14頁 |
| 文件大?。?/td> | 268K |
| 代理商： | ADC1241CIJ |
AC Electrical Characteristics
The following specifications apply for DV
CC
e
AV
CC
e a
5.0V, V
b
e b
5.0V, t
r
e
t
f
e
20 ns unless otherwise specified.
Boldface limits apply for T
A
e
T
J
e
T
MIN
to T
MAX
;
all other limits T
A
e
T
J
e
25
§
C. (Notes 6 and 7)
Symbol
Parameter
Conditions
Typical
(Note 9)
Limit
Units
(Limits)
(Notes 10, 18)
f
CLK
Clock Frequency
2.0
MHz
0.5
4.0
MHz(min)
MHZ(max)
Clock Duty Cycle
50
%
40
60
%(min)
%(max)
t
C
Conversion Time
27(1/f
CLK
)
27(1/f
CLK
)
a
300 ns
(max)
f
CLK
e
2.0 MHz
13.5
m
s
t
A
Acquisition Time
(Note 15)
R
SOURCE
e
50
X
f
CLK
e
2.0 MHz
7(1/f
CLK
)
3.5
7(1/f
CLK
)
a
300 ns
(max)
m
s
t
Z
Auto Zero Time
26
26
1/f
CLK
(max)
f
CLK
e
2.0 MHz
13
m
s
t
CAL
Calibration Time
1396
1/f
CLK
f
CLK
e
2.0 MHz
698
706
m
s (max)
t
W(CAL)L
Calibration Pulse Width
(Note 16)
60
200
ns(min)
t
W(WR)L
Minimum WR Pulse Width
60
200
ns(min)
t
ACC
Maximum Access Time
(Delay from Falling Edge of
RD to Output Data Valid)
C
L
e
100 pF
50
85
ns(max)
t
0H
, t
1H
TRI-STATE Control (Delay
from Rising Edge of RD
to Hi-Z State)
R
L
e
1 k
X
,
C
L
e
100 pF
30
90
ns(max)
t
PD(INT)
Maximum Delay from Falling Edge of
RD or WR to Reset of INT
100
175
ns(max)
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2:
All voltages are measured with respect to AGND and DGND, unless otherwise specified.
Note 3:
When the input voltage (V
IN
) at any pin exceeds the power supply rails (V
IN
k
V
b
or V
IN
l
(AV
CC
or DV
CC
), the current at that pin should be limited to
5 mA. The 20 mA maximum package input current rating allows the voltage at any four pins, with an input current limit of 5 mA, to simultaneously exceed the power
supply voltages.
Note 4:
The maximum power dissipation must be derated at elevated temperatures and is dictated by T
JMAX
(maximum junction temperature),
i
JA
(package
junction to ambient thermal resistance), and T
A
(ambient temperature). The maximum allowable power dissipation at any temperature is P
Dmax
e
(T
Jmax
b
T
A
)/
i
JA
or the number given in the Absolute Maximum Ratings, whichever is lower. For this device, T
Jmax
e
125
§
C, and the typical thermal resistance (
i
JA
) of the
ADC1241 with CMJ, BIJ, and CIJ suffixes when board mounted is 47
§
C/W.
Note 5:
Human body model, 100 pF discharged through a 1.5 k
X
resistor.
Note 6:
Two on-chip diodes are tied to the analog input as shown below. Errors in the A/D conversion can occur if these diodes are forward biased more than
50 mV.
TL/H/10554–3
This means that if AV
CC
and DV
CC
are minimum (4.75 V
DC
) and V
b
is maximum (
b
4.75 V
DC
), full-scale must be
s
4.8 V
DC
.
4
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADC12441 | Dynamically-Tested Self-Calibrating 12-Bit Plus Sign A/D Converter with Sample-and-Hold(可自行校對的12位帶采樣和保持功能的A/D轉(zhuǎn)換器) |
| ADC12441883 | Dynamically-Tested Self-Calibrating 12-Bit Plus Sign A/D Converter with Sample-and-Hold |
| ADC12441CMJ | Dynamically-Tested Self-Calibrating 12-Bit Plus Sign A/D Converter with Sample-and-Hold |
| ADC12441CIJ | Dynamically-Tested Self-Calibrating 12-Bit Plus Sign A/D Converter with Sample-and-Hold |
| ADC12451883 | Dynamically-Tested Self-Calibrating 12-Bit Plus Sign A/D Converter with Sample-and-Hold |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC1241CMJ | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Self-Calibrating 12-Bit Plus Sign mP-Compatible A/D Converter with Sample-and-Hold |
| ADC1242 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| ADC1242CIJ | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit Plus Sign Sampling A/D Converter |
| ADC1243D125HD-C1 | 制造商:Integrated Device Technology Inc 功能描述:HLQFN56R - Bulk |
| ADC1243D160HD-C1 | 制造商:Integrated Device Technology Inc 功能描述:HLQFN56R - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。